summaryrefslogtreecommitdiffstats
path: root/hw/arm/aspeed_soc.c
Commit message (Expand)AuthorAgeFilesLines
* aspeed: Refactor UART init for multi-SoC machinesPeter Delevoryas2022-07-141-16/+34
* aspeed: Create SRAM name from first CPU indexPeter Delevoryas2022-07-141-2/+3
* hw/misc/aspeed: Add PECI controllerPeter Delevoryas2022-06-301-0/+14
* aspeed: Map unimplemented devices in SoC memoryPeter Delevoryas2022-06-301-4/+19
* aspeed: Remove usage of sysbus_mmio_mapPeter Delevoryas2022-06-301-19/+28
* aspeed: Add memory property to Aspeed SoCPeter Delevoryas2022-06-301-5/+7
* aspeed: Set CPU memory property explicitlyPeter Delevoryas2022-06-301-0/+2
* aspeed: Set the dram container at the SoC levelCédric Le Goater2022-06-301-2/+47
* hw: aspeed: Init all UART's with serial devicesPeter Delevoryas2022-05-251-0/+9
* hw: aspeed: Introduce common UART init functionPeter Delevoryas2022-05-251-4/+12
* hw: aspeed: Add uarts_num SoC attributePeter Delevoryas2022-05-251-0/+2
* hw: aspeed: Add missing UART'sPeter Delevoryas2022-05-251-0/+6
* aspeed: Introduce a get_irq AspeedSoCClass methodCédric Le Goater2022-05-251-3/+10
* aspeed/smc: Remove 'num_cs' fieldCédric Le Goater2022-03-081-2/+0Star
* hw/arm: Integrate ADC model into Aspeed SoCAndrew Jeffery2021-10-121-0/+11
* aspeed/smc: Drop AspeedSMCController structureCédric Le Goater2021-10-121-2/+2
* hw/arm/aspeed: Allow machine to set UART defaultPeter Delevoryas2021-09-201-3/+5
* Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pul...Peter Maydell2021-05-051-3/+0Star
|\
| * Do not include exec/address-spaces.h if it's not really necessaryThomas Huth2021-05-021-1/+0Star
| * Do not include cpu.h if it's not really necessaryThomas Huth2021-05-021-1/+0Star
| * hw: Do not include qemu/log.h if it is not necessaryThomas Huth2021-05-021-1/+0Star
* | hw/misc/aspeed_xdma: Add AST2600 supportCédric Le Goater2021-05-011-1/+2
* | aspeed: Integrate HACEJoel Stanley2021-05-011-0/+16
* | aspeed/smc: Remove unused "sdram-base" propertyCédric Le Goater2021-05-011-4/+0Star
|/
* hw/misc: Model KCS devices in the Aspeed LPC controllerAndrew Jeffery2021-03-091-1/+23
* hw/misc: Add a basic Aspeed LPC controller modelCédric Le Goater2021-03-091-0/+10
* hw/arm/aspeed: Map the UART5 device unconditionallyPhilippe Mathieu-Daudé2020-09-181-5/+3Star
* aspeed_soc: Rename memmap/irqmap enum constantsEduardo Habkost2020-08-271-114/+114
* error: Eliminate error_propagate() with Coccinelle, part 1Markus Armbruster2020-07-101-32/+16Star
* qom: Use returned bool to check for failure, Coccinelle partMarkus Armbruster2020-07-101-3/+2Star
* qom: Put name parameter before value / visitor parameterMarkus Armbruster2020-07-101-12/+11Star
* qdev: Use returned bool to check for qdev_realize() etc. failureMarkus Armbruster2020-07-101-30/+15Star
* aspeed: Fix realize error API violationMarkus Armbruster2020-07-021-2/+3
* hw/arm: Drop useless object_property_set_link() error handlingMarkus Armbruster2020-07-021-10/+4Star
* aspeed: Clean up roundabout error propagationMarkus Armbruster2020-07-021-6/+4Star
* qdev: Convert bus-less devices to qdev_realize() with CoccinelleMarkus Armbruster2020-06-151-1/+1
* sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 4Markus Armbruster2020-06-151-2/+2
* sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 2Markus Armbruster2020-06-151-39/+30Star
* sysbus: Drop useless OBJECT() in sysbus_init_child_obj() callsMarkus Armbruster2020-06-151-20/+15Star
* qom: Less verbose object_initialize_child()Markus Armbruster2020-06-151-3/+1Star
* arm/aspeed: Rework NIC attachmentCédric Le Goater2020-06-151-2/+1Star
* arm/aspeed: Compute the number of CPUs from the SoC definitionCédric Le Goater2020-06-151-8/+1Star
* qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster2020-05-151-7/+6Star
* hw/arm: ast2400/ast2500: Wire up EHCI controllersGuenter Roeck2020-02-131-0/+25
* hw/sd: Configure number of slots exposed by the ASPEED SDHCI modelAndrew Jeffery2020-01-301-0/+2
* qdev: set properties with device_class_set_props()Marc-André Lureau2020-01-241-1/+1
* aspeed: Change the "scu" property definitionCédric Le Goater2019-12-161-4/+4
* aspeed/i2c: Add support for DMA transfersCédric Le Goater2019-12-161-0/+5
* aspeed: Add a DRAM memory region at the SoC levelCédric Le Goater2019-12-161-2/+7
* aspeed/soc: Add ASPEED Video stubJoel Stanley2019-10-151-0/+6
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-01-15 21:50:38 +0100