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path: root/hw/intc/arm_gicv3_cpuif.c
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* arm_gicv3: Fix ICC_BPR1 reset value when EL3 not implementedPeter Maydell2017-06-071-5/+1Star
* hw/intc/arm_gicv3_cpuif: Fix priority masking for NS BPR1Peter Maydell2017-06-021-4/+38
* hw/intc/arm_gicv3_cpuif: Don't let BPR be set below its minimumPeter Maydell2017-06-021-0/+6
* hw/intc/arm_gicv3_cpuif: Fix reset value for VMCR_EL2.VBPR1Peter Maydell2017-06-021-1/+1
* target-arm: Add GICv3CPUState in CPUARMState structVijaya Kumar K2017-02-281-0/+8
* tcg: drop global lock during TCG code executionJan Kiszka2017-02-241-0/+3
* arm_gicv3: Fix broken logic in ELRSR calculationPeter Maydell2017-01-271-1/+1
* hw/intc/arm_gicv3: Implement EL2 traps for CPU i/f regsPeter Maydell2017-01-201-10/+60
* hw/intc/arm_gicv3: Implement gicv3_cpuif_virt_update()Peter Maydell2017-01-201-0/+49
* hw/intc/arm_gicv3: Implement ICV_ registers EOIR and IARPeter Maydell2017-01-201-0/+220
* hw/intc/arm_gicv3: Implement ICV_ HPPIR, DIR and RPR registersPeter Maydell2017-01-201-3/+232
* hw/intc/arm_gicv3: Implement ICV_ registers which are just accessorsPeter Maydell2017-01-201-0/+239
* hw/intc/arm_gicv3: Add accessors for ICH_ system registersPeter Maydell2017-01-201-0/+477
* hw/intc/gicv3: Add data fields for virtualization supportPeter Maydell2017-01-201-0/+13
* hw/intc/arm_gicv3: Remove incorrect usage of fieldoffsetPeter Maydell2016-12-271-7/+6Star
* hw/intc/arm_gicv3: Fix ICC register tracepointsPeter Maydell2016-10-171-8/+15
* hw/intc/arm_gicv3: Add missing breakShannon Zhao2016-06-271-0/+2
* hw/intc/arm_gicv3: Add IRQ handling CPU interface registersPeter Maydell2016-06-171-0/+437
* hw/intc/arm_gicv3: Implement CPU i/f SGI generation registersPeter Maydell2016-06-171-0/+125
* hw/intc/arm_gicv3: Implement gicv3_cpuif_update()Peter Maydell2016-06-171-1/+139
* hw/intc/arm_gicv3: Implement GICv3 CPU interface registersPeter Maydell2016-06-171-0/+646