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path: root/hw/intc/arm_gicv3_redist.c
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* misc: fix commonly doubled up wordsDaniel P. Berrangé2022-08-011-1/+1
* Fix 'writeable' typosPeter Maydell2022-06-081-2/+2
* hw/intc/arm_gicv3: Update ID and feature registers for GICv4Peter Maydell2022-04-221-1/+1
* hw/intc/arm_gicv3_redist: Implement gicv3_redist_inv_vlpi()Peter Maydell2022-04-221-2/+5
* hw/intc/arm_gicv3_redist: Implement gicv3_redist_vinvall()Peter Maydell2022-04-221-1/+7
* hw/intc/arm_gicv3_redist: Implement gicv3_redist_mov_vlpi()Peter Maydell2022-04-221-2/+18
* hw/intc/arm_gicv3_redist: Use set_pending_table_bit() in mov handlingPeter Maydell2022-04-221-8/+1Star
* hw/intc/arm_gicv3_redist: Implement gicv3_redist_vlpi_pending()Peter Maydell2022-04-221-2/+21
* hw/intc/arm_gicv3_redist: Implement gicv3_redist_process_vlpi()Peter Maydell2022-04-221-4/+44
* hw/intc/arm_gicv3_redist: Factor out "update bit in pending table" codePeter Maydell2022-04-221-19/+30
* hw/intc/arm_gicv3_redist: Recalculate hppvlpi on VPENDBASER writesPeter Maydell2022-04-221-3/+84
* hw/intc/arm_gicv3_redist: Factor out "update hpplpi for all LPIs" logicPeter Maydell2022-04-221-20/+46
* hw/intc/arm_gicv3_redist: Factor out "update hpplpi for one LPI" logicPeter Maydell2022-04-221-27/+47
* hw/intc/arm_gicv3_cpuif: Support vLPIsPeter Maydell2022-04-221-0/+8
* hw/intc/arm_gicv3: Implement new GICv4 redistributor registersPeter Maydell2022-04-221-0/+56
* hw/intc/arm_gicv3: Implement GICv4's new redistributor framePeter Maydell2022-04-221-4/+4
* hw/intc/arm_gicv3_its: Implement VINVALLPeter Maydell2022-04-221-0/+5
* hw/intc/arm_gicv3_its: Implement VMOVIPeter Maydell2022-04-221-0/+10
* hw/intc/arm_gicv3_its: Implement INV for virtual interruptsPeter Maydell2022-04-221-0/+8
* hw/intc/arm_gicv3_its: Implement INV command properlyPeter Maydell2022-04-221-0/+11
* hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd()Peter Maydell2022-04-221-0/+9
* hw/intc/arm_gicv3: Report correct PIDR0 values for ID registersPeter Maydell2022-04-221-1/+1
* hw/intc/arm_gicv3_its: Implement MOVIPeter Maydell2022-01-281-0/+53
* hw/intc/arm_gicv3_its: Implement MOVALLPeter Maydell2022-01-281-0/+54
* hw/intc/arm_gicv3_redist: Remove unnecessary zero checksPeter Maydell2022-01-281-5/+3Star
* hw/intc/arm_gicv3: Check for !MEMTX_OK instead of MEMTX_ERRORPhilippe Mathieu-Daudé2022-01-201-2/+2
* hw/intc/arm_gicv3: Update cached state after LPI state changesPeter Maydell2021-11-261-4/+10
* hw/intc/arm_gicv3: Support multiple redistributor regionsPeter Maydell2021-11-151-18/+22
* hw/intc: GICv3 redistributor ITS processingShashi Mallela2021-09-131-0/+141
* hw/intc: GICv3 ITS Feature enablementShashi Mallela2021-09-131-3/+9
* hw/intc: Improve formatting of MEMTX_ERROR guest error messageRebecca Cran2021-07-091-2/+2
* hw/intc/arm_gicv3: Fix decoding of ID register rangePeter Maydell2019-06-171-2/+2
* hw/intc/arm_gicv3: fix an extra left-shift when reading IPRIORITYRAmol Surati2018-06-221-1/+2
* hw/intc/arm_gicv3: Make reserved register addresses RAZ/WIPeter Maydell2018-01-111-0/+13
* arm_gicv3: Add assert()s to tell Coverity that offsets are alignedPeter Maydell2016-07-191-0/+4
* hw/intc/arm_gicv3: Fix compilation with simple trace backendPeter Maydell2016-06-201-0/+1
* hw/intc/arm_gicv3: Implement CPU i/f SGI generation registersPeter Maydell2016-06-171-0/+40
* hw/intc/arm_gicv3: Implement gicv3_set_irq()Peter Maydell2016-06-171-0/+21
* hw/intc/arm_gicv3: Implement GICv3 redistributor registersShlomo Pongratz2016-06-171-0/+501
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