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path: root/hw/intc/armv7m_nvic.c
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* hw/intc/armv7m_nvic: ICPRn must not unpend an IRQ that is being held highPeter Maydell2022-07-181-1/+8
* arm: Move system PPB container handling to armv7mPeter Maydell2021-09-011-141/+4Star
* arm: Move systick device creation from NVIC to ARMv7M objectPeter Maydell2021-09-011-73/+0Star
* arm: Move M-profile RAS register block into its own devicePeter Maydell2021-09-011-56/+0Star
* hw/intc/armv7m_nvic: for v8.1M VECTPENDING hides S exceptions from NSPeter Maydell2021-07-271-7/+24
* hw/intc/armv7m_nvic: Correct size of ICSR.VECTPENDINGPeter Maydell2021-07-271-1/+1
* hw/intc/armv7m_nvic: ISCR.ISRPENDING is set for non-enabled pending interruptsPeter Maydell2021-07-271-5/+4Star
* hw/intc/armv7m_nvic: Remove stale commentPeter Maydell2021-06-151-6/+0Star
* Do not include cpu.h if it's not really necessaryThomas Huth2021-05-021-1/+0Star
* hw/intc/armv7m_nvic: Correct handling of CCR.BFHFNMIGNPeter Maydell2021-01-081-0/+15
* hw/intc/armv7m_nvic: Implement read/write for RAS register blockPeter Maydell2020-12-101-0/+56
* target/arm: Implement M-profile "minimal RAS implementation"Peter Maydell2020-12-101-0/+13
* hw/intc/armv7m_nvic: Fix "return from inactive handler" checkPeter Maydell2020-12-101-27/+32
* hw/intc/armv7m_nvic: Support v8.1M CCR.TRD bitPeter Maydell2020-12-101-8/+18
* target/arm: Implement v8.1M REVIDR registerPeter Maydell2020-12-101-0/+5
* hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1MPeter Maydell2020-12-101-1/+8
* hw/intc/armv7m_nvic: Make all of system PPB range be RAZWI/BusFaultPeter Maydell2020-12-101-11/+67
* hw/intc/armv7m_nvic: Only show ID register values for Main Extension CPUsPeter Maydell2020-10-011-0/+42
* target/arm: Move id_pfr0, id_pfr1 into ARMISARegistersPeter Maydell2020-10-011-2/+2
* hw: Remove superfluous breaksLiao Pingfang2020-09-011-1/+0Star
* hw/intc/armv7m_nvic: Provide default "reset the system" behaviour for SYSRESE...Peter Maydell2020-08-031-1/+16
* error: Eliminate error_propagate() with Coccinelle, part 1Markus Armbruster2020-07-101-5/+2Star
* qdev: Use returned bool to check for qdev_realize() etc. failureMarkus Armbruster2020-07-101-4/+2Star
* sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 3Markus Armbruster2020-06-151-4/+3Star
* sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 1Markus Armbruster2020-06-151-5/+3Star
* hw/intc/armv7m_nvic: Rebuild hflags on resetPeter Maydell2020-03-121-0/+6
* target/arm: Add isar_feature_aa32_vfp_simdRichard Henderson2020-02-281-10/+10
* target/arm: Test correct register in aa32_pan and aa32_ats1e1 checksPeter Maydell2020-02-211-4/+4
* target/arm: Define an aa32_pmu_8_1 isar feature test functionPeter Maydell2020-02-211-1/+1
* qdev: set properties with device_class_set_props()Marc-André Lureau2020-01-241-1/+1
* target/arm: Rebuild hflags for M-profile NVICRichard Henderson2019-10-241-9/+13
* memory: Access MemoryRegion with endiannessTony Nguyen2019-09-031-7/+8
* hw/intc/armv7m_nic: Access MemoryRegion with MemOpTony Nguyen2019-09-031-4/+8
* Include hw/qdev-properties.h lessMarkus Armbruster2019-08-161-0/+1
* Include migration/vmstate.h lessMarkus Armbruster2019-08-161-0/+1
* Include hw/irq.h a lot lessMarkus Armbruster2019-08-161-0/+1
* target/arm: v8M: Check state of exception being returned fromPeter Maydell2019-07-041-1/+13
* arm v8M: Forcibly clear negative-priority exceptions on deactivatePeter Maydell2019-07-041-5/+35
* Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster2019-06-121-1/+1
* hw/intc/nvic: Use object_initialize_child for correct reference countingPhilippe Mathieu-Daudé2019-05-241-3/+3
* arm: Remove unnecessary includes of hw/arm/arm.hPeter Maydell2019-05-231-1/+0Star
* hw/intc/armv7m_nvic: Don't enable ARMV7M_EXCP_DEBUG from resetPeter Maydell2019-05-071-1/+3
* hw/intc/armv7m_nvic: NS BFAR and BFSR are RAZ/WI if BFHFNMINS == 0Peter Maydell2019-05-071-3/+24
* hw/arm/armv7m_nvic: Check subpriority in nvic_recompute_state_secure()Peter Maydell2019-05-071-2/+7
* target/arm: New function armv7m_nvic_set_pending_lazyfp()Peter Maydell2019-04-291-0/+96
* target/arm: Implement v7m_update_fpccr()Peter Maydell2019-04-291-0/+34
* target/arm: Implement dummy versions of M-profile FP-related registersPeter Maydell2019-04-291-0/+125
* hw/intc/armv7m_nvic: Allow reading of M-profile MVFR* registersPeter Maydell2019-04-291-0/+6
* hw/intc/armv7m_nvic: Allow byte accesses to SHPR1Peter Maydell2019-02-151-2/+2
* armv7m: Don't assume the NVIC's CPU is CPU 0Peter Maydell2019-02-011-2/+1Star
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