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path: root/hw/intc/gicv3_internal.h
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* hw/intc/arm_gicv3: Update ID and feature registers for GICv4Peter Maydell2022-04-221-4/+11
* hw/intc/arm_gicv3_cpuif: Support vLPIsPeter Maydell2022-04-221-0/+13
* hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3_cpuif_virt_update()Peter Maydell2022-04-221-0/+11
* hw/intc/arm_gicv3: Implement new GICv4 redistributor registersPeter Maydell2022-04-221-0/+21
* hw/intc/arm_gicv3: Implement GICv4's new redistributor framePeter Maydell2022-04-221-0/+21
* hw/intc/arm_gicv3_its: Implement VINVALLPeter Maydell2022-04-221-0/+13
* hw/intc/arm_gicv3_its: Implement VMOVIPeter Maydell2022-04-221-0/+23
* hw/intc/arm_gicv3_its: Implement INV for virtual interruptsPeter Maydell2022-04-221-0/+9
* hw/intc/arm_gicv3_its: Implement INV command properlyPeter Maydell2022-04-221-0/+12
* hw/intc/arm_gicv3_its: Implement VSYNCPeter Maydell2022-04-221-0/+1
* hw/intc/arm_gicv3_its: Implement VMOVPPeter Maydell2022-04-221-0/+9
* hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd()Peter Maydell2022-04-221-0/+17
* hw/intc/arm_gicv3_its: Implement VMAPPPeter Maydell2022-04-221-0/+12
* hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTIPeter Maydell2022-04-221-0/+9
* hw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4Peter Maydell2022-04-221-0/+16
* hw/intc/arm_gicv3: Report correct PIDR0 values for ID registersPeter Maydell2022-04-221-2/+13
* hw/intc/arm_gicv3_its: Fix address calculation in get_ite() and update_ite()Peter Maydell2022-02-081-9/+10
* hw/intc/arm_gicv3_its: Use address_space_map() to access command queue packetsPeter Maydell2022-02-081-2/+2
* hw/intc/arm_gicv3_its: Implement MOVIPeter Maydell2022-01-281-0/+16
* hw/intc/arm_gicv3_its: Implement MOVALLPeter Maydell2022-01-281-0/+16
* hw/intc/arm_gicv3: Set GICR_CTLR.CES if LPIs are supportedPeter Maydell2022-01-281-0/+1
* hw/intc/arm_gicv3_its: Sort ITS command list into numeric orderPeter Maydell2022-01-281-5/+5
* hw/intc/arm_gicv3_its: Use FIELD macros for CTEsPeter Maydell2022-01-071-1/+2
* hw/intc/arm_gicv3_its: Correct comment about CTE RDBase field sizePeter Maydell2022-01-071-1/+1
* hw/intc/arm_gicv3_its: Use FIELD macros for DTEsPeter Maydell2022-01-071-3/+4
* hw/intc/arm_gicv3_its: Don't misuse GITS_TYPE_PHYSICAL definePeter Maydell2022-01-071-12/+14
* hw/intc/arm_gicv3_its: Remove redundant ITS_CTLR_ENABLED definePeter Maydell2022-01-071-2/+0Star
* hw/intc/arm_gicv3: Add new gicv3_intid_is_special() functionPeter Maydell2021-11-261-0/+13
* hw/intc/arm_gicv3: Update cached state after LPI state changesPeter Maydell2021-11-261-0/+17
* hw/intc: GICv3 redistributor ITS processingShashi Mallela2021-09-131-0/+9
* hw/intc: GICv3 ITS Feature enablementShashi Mallela2021-09-131-0/+2
* hw/intc: GICv3 ITS Command processingShashi Mallela2021-09-131-0/+12
* hw/intc: GICv3 ITS command queue frameworkShashi Mallela2021-09-131-0/+40
* hw/intc: GICv3 ITS register definitions addedShashi Mallela2021-09-131-0/+29
* hw/intc: GICv3 ITS initial frameworkShashi Mallela2021-09-131-10/+86
* target-arm: Add GICv3CPUState in CPUARMState structVijaya Kumar K2017-02-281-0/+2
* hw/intc/arm_gicv3_kvm: Implement get/put functionsVijaya Kumar K2017-02-281-0/+1
* hw/intc/gicv3: Add defines for ICH system register fieldsPeter Maydell2017-01-201-0/+79
* Clean up decorations and whitespace around header guardsMarkus Armbruster2016-07-121-1/+1
* hw/intc/arm_gicv3: Add IRQ handling CPU interface registersPeter Maydell2016-06-171-0/+5
* hw/intc/arm_gicv3: Implement CPU i/f SGI generation registersPeter Maydell2016-06-171-0/+1
* hw/intc/arm_gicv3: Implement gicv3_cpuif_update()Peter Maydell2016-06-171-4/+1Star
* hw/intc/arm_gicv3: Implement GICv3 CPU interface registersPeter Maydell2016-06-171-0/+1
* hw/intc/arm_gicv3: Implement gicv3_set_irq()Peter Maydell2016-06-171-0/+2
* hw/intc/arm_gicv3: Implement GICv3 redistributor registersShlomo Pongratz2016-06-171-0/+4
* hw/intc/arm_gicv3: Implement GICv3 distributor registersShlomo Pongratz2016-06-171-0/+4
* hw/intc/arm_gicv3: Implement functions to identify next pending irqPeter Maydell2016-06-171-0/+121
* hw/intc/arm_gicv3: ARM GICv3 device frameworkShlomo Pongratz2016-06-171-0/+24
* hw/intc/arm_gicv3: Add state informationPavel Fedin2016-06-171-0/+172
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