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* hw/intc: Add LoongArch extioi interrupt controller(EIOINTC)Xiaojuan Yang2022-06-061-0/+1
* hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI)Xiaojuan Yang2022-06-061-0/+1
* hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)Xiaojuan Yang2022-06-061-0/+1
* hw/loongarch: Add LoongArch ipi interrupt support(IPI)Xiaojuan Yang2022-06-061-0/+1
* hw/intc: Vectored Interrupt Controller (VIC)Amir Gonnen2022-04-261-0/+1
* hw/intc: Rename CONFIG_ARM_GIC_TCG into CONFIG_ARM_GICV3_TCGEric Auger2022-03-181-2/+2
* hw/intc: Add RISC-V AIA IMSIC device emulationAnup Patel2022-03-031-0/+1
* ppc/pnv: Add a XIVE2 controller to the POWER10 chipCédric Le Goater2022-03-021-1/+1
* ppc/xive2: Introduce a XIVE2 core frameworkCédric Le Goater2022-03-021-1/+1
* hw/intc: Add RISC-V AIA APLIC device emulationAnup Patel2022-02-161-0/+1
* hw/intc/arm_gicv3: Introduce CONFIG_ARM_GIC_TCG Kconfig selectorPhilippe Mathieu-Daudé2021-12-151-4/+6
* hw/intc/arm_gicv3: Extract gicv3_set_gicv3state from arm_gicv3_cpuif.cPhilippe Mathieu-Daudé2021-12-151-0/+1
* hw/intc: Remove the Ibex PLICAlistair Francis2021-10-221-1/+0Star
* hw/intc: Rename sifive_clint sources to riscv_aclint sourcesAnup Patel2021-09-201-1/+1
* hw/intc: GICv3 ITS initial frameworkShashi Mallela2021-09-131-0/+1
* Drop the deprecated unicore32 targetMarkus Armbruster2021-05-121-1/+0Star
* Drop the deprecated lm32 targetMarkus Armbruster2021-05-121-1/+0Star
* m68k: add an interrupt controllerLaurent Vivier2021-03-151-0/+1
* hw/intc: add goldfish-picLaurent Vivier2021-03-151-0/+1
* hw/lm32/Kconfig: Rename CONFIG_LM32 -> CONFIG_LM32_DEVICESPhilippe Mathieu-Daudé2021-03-091-1/+1
* hw/intc: Introduce SH_INTC Kconfig entryPhilippe Mathieu-Daudé2021-03-061-1/+1
* ppc: Simplify reverse dependencies of POWERNV and PSERIES on XICS and XIVEGreg Kurz2021-01-061-2/+1Star
* ppc: Fix build with --without-default-devicesGreg Kurz2021-01-061-3/+6
* ppc: Convert PPC UIC to a QOM devicePeter Maydell2021-01-061-0/+1
* target/nios2: Move IIC code into CPU object properPeter Maydell2020-12-151-1/+0Star
* hw/riscv: Move sifive_plic model to hw/intcBin Meng2020-09-101-0/+1
* hw/riscv: Move sifive_clint model to hw/intcBin Meng2020-09-101-0/+1
* meson: convert hw/intcMarc-André Lureau2020-08-211-0/+55