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* Convert references to logfile/loglevel to use qemu_log*() macrosaliguori2009-01-151-3/+1Star
* target-mips: CP0 Random register improvementsaurel322009-01-081-3/+8
* MIPS: remove empty cpu_mips_irqctrl_init()aurel322008-09-141-4/+0Star
* Add instruction counter.pbrook2008-06-291-0/+5
* Optimize MIPS timer read/write functionsaurel322008-04-111-31/+25Star
* Break up vl.h.pbrook2007-11-171-1/+3
* Timer start/stop implementation, by Aurelien Jarno.ths2007-09-251-5/+24
* Partial support for 34K multithreading, not functional yet.ths2007-09-061-1/+1
* Choose number of TLBs at runtime, by Herve Poussineau.ths2007-04-171-1/+1
* Unify IRQ handling.pbrook2007-04-071-2/+2
* Fix disabling of the Cause register for R2.ths2007-04-061-11/+11
* Fix BD flag handling, cause register contents, implement some more bitsths2007-03-181-0/+7
* Reworking MIPS interrupt handling, by Aurelien Jarno.ths2007-01-241-4/+2Star
* Move the MIPS CPU timer in a seperate file, by Alec Voropay.ths2006-12-061-0/+85
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