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* failover: Rename bool to failover_primary_hiddenJuan Quintela2020-12-081-7/+7
| | | | | | | | | | You should not use passive naming variables. And once there, be able to search for them. Signed-off-by: Juan Quintela <quintela@redhat.com> Message-Id: <20201118083748.1328-9-quintela@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* failover: qdev_device_add() returns err or dev setJuan Quintela2020-12-081-7/+0Star
| | | | | | | | | Never both. Signed-off-by: Juan Quintela <quintela@redhat.com> Message-Id: <20201118083748.1328-8-quintela@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* failover: Remove external partially_hotplugged propertyJuan Quintela2020-12-081-4/+0Star
| | | | | | | | | | It was only set "once", and with the wrong value. As far as I can see, libvirt still don't use it. Signed-off-by: Juan Quintela <quintela@redhat.com> Message-Id: <20201118083748.1328-7-quintela@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* failover: Remove unused parameterJuan Quintela2020-12-081-5/+3Star
| | | | | | | Signed-off-by: Juan Quintela <quintela@redhat.com> Message-Id: <20201118083748.1328-6-quintela@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* failover: primary bus is only used once, and where it is setJuan Quintela2020-12-081-4/+4
| | | | | | | | | Just remove the struct member. Signed-off-by: Juan Quintela <quintela@redhat.com> Message-Id: <20201118083748.1328-5-quintela@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* failover: Use always atomics for primary_should_be_hiddenJuan Quintela2020-12-081-1/+1
| | | | | | | Signed-off-by: Juan Quintela <quintela@redhat.com> Message-Id: <20201118083748.1328-4-quintela@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* failover: fix indentantionJuan Quintela2020-12-081-18/+15Star
| | | | | | | | | Once there, remove not needed cast. Signed-off-by: Juan Quintela <quintela@redhat.com> Message-Id: <20201118083748.1328-3-quintela@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* hw/net/dp8393x: fix integer underflow in dp8393x_do_transmit_packets()Mauro Matteo Cascella2020-12-011-0/+4
| | | | | | | | | | | | | An integer underflow could occur during packet transmission due to 'tx_len' not being updated if SONIC_TFC register is set to zero. Check for negative 'tx_len' when removing existing FCS. RHBZ: https://bugzilla.redhat.com/show_bug.cgi?id=1899722 Signed-off-by: Mauro Matteo Cascella <mcascell@redhat.com> Reported-by: Gaoning Pan <pgn@zju.edu.cn> Acked-by: Jason Wang <jasowang@redhat.com> Message-id: 20201124092445.658647-1-mcascell@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/net/e1000e: advance desc_offset in case of null descriptorPrasad J Pandit2020-11-241-4/+4
| | | | | | | | | | | | While receiving packets via e1000e_write_packet_to_guest() routine, 'desc_offset' is advanced only when RX descriptor is processed. And RX descriptor is not processed if it has NULL buffer address. This may lead to an infinite loop condition. Increament 'desc_offset' to process next descriptor in the ring to avoid infinite loop. Reported-by: Cheol-woo Myung <330cjfdn@gmail.com> Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Signed-off-by: Jason Wang <jasowang@redhat.com>
* nomaintainer: Fix Lesser GPL version numberChetan Pant2020-11-152-2/+2
| | | | | | | | | | | | | | | | There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. This patch contains all the files, whose maintainer I could not get from ‘get_maintainer.pl’ script. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Message-Id: <20201023124424.20177-1-chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> [thuth: Adapted exec.c and qdev-monitor.c to new location] Signed-off-by: Thomas Huth <thuth@redhat.com>
* e1000e: Fix Lesser GPL version numberChetan Pant2020-11-155-5/+5
| | | | | | | | | | | | There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Message-Id: <20201023124134.20083-1-chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* hw/net/can/ctucan_core: Use stl_le_p to write to tx_buffersPeter Maydell2020-11-111-4/+2Star
| | | | | | | | | | | | Instead of casting an address within a uint8_t array to a uint32_t*, use stl_le_p(). This handles possibly misaligned addresses which would otherwise crash on some hosts. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Tested-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Jason Wang <jasowang@redhat.com>
* hw/net/can/ctucan_core: Handle big-endian hostsPeter Maydell2020-11-111-2/+1Star
| | | | | | | | | | | | | | | | | | | | | | The ctucan driver defines types for its registers which are a union of a uint32_t with a struct with bitfields for the individual fields within that register. This is a bad idea, because bitfields aren't portable. The ctu_can_fd_regs.h header works around the most glaring of the portability issues by defining the fields in two different orders depending on the setting of the __LITTLE_ENDIAN_BITFIELD define. However, in ctucan_core.h this is unconditionally set to 1, which is wrong for big-endian hosts. Set it only if HOST_WORDS_BIGENDIAN is not set. There is no need for a "have we defined it already" guard, because the only place that should set it is ctucan_core.h, which has the usual double-inclusion guard. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Tested-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Jason Wang <jasowang@redhat.com>
* hw/net/can/ctucan: Avoid unused value in ctucan_send_ready_buffers()Peter Maydell2020-11-111-12/+3Star
| | | | | | | | | | | | | | | | | | | | | | | Coverity points out that in ctucan_send_ready_buffers() we set buff_st_mask = 0xf << (i * 4) inside the loop, but then we never use it before overwriting it later. The only thing we use the mask for is as part of the code that is inserting the new buff_st field into tx_status. That is more comprehensibly written using deposit32(), so do that and drop the mask variable entirely. We also update the buff_st local variable at multiple points during this function, but nothing can ever see these intermediate values, so just drop those, write the final TXT_TOK as a fixed constant value, and collapse the only remaining set/use of buff_st down into an extract32(). Fixes: Coverity CID 1432869 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Tested-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Jason Wang <jasowang@redhat.com>
* hw/net/can/ctucan: Don't allow guest to write off end of tx_bufferPeter Maydell2020-11-111-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ctucan device has 4 CAN bus cores, each of which has a set of 20 32-bit registers for writing the transmitted data. The registers are however not contiguous; each core's buffers is 0x100 bytes after the last. We got the checks on the address wrong in the ctucan_mem_write() function: * the first "is addr in range at all" check allowed addr == CTUCAN_CORE_MEM_SIZE, which is actually the first byte off the end of the range * the decode of addresses into core-number plus offset in the tx buffer for that core failed to check that the offset was in range, so the guest could write off the end of the tx_buffer[] array NB: currently the values of CTUCAN_CORE_MEM_SIZE, CTUCAN_CORE_TXBUF_NUM, etc, make "buff_num >= CTUCAN_CORE_TXBUF_NUM" impossible, but we retain this as a runtime check rather than an assertion to permit those values to be changed in future (in hardware they are configurable synthesis parameters). Fix the top level check, and check the offset is within the buffer. Fixes: Coverity CID 1432874 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Tested-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Jason Wang <jasowang@redhat.com>
* virtio-net: Set mac address to hardware if the peer is vdpaCindy Lu2020-11-111-0/+6
| | | | | | | | If the peer's type is vdpa, we need to set the mac address to hardware in virtio_net_device_realize, Signed-off-by: Cindy Lu <lulu@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
* hw/net: move allocation to the heap due to very large stack frameElena Afanasova2020-10-271-2/+3
| | | | | | | | | [dwg] The stack frame itself probably isn't that big a deal, but avoiding alloca() is generally recommended these days. Signed-off-by: Elena Afanasova <eafanasova@gmail.com> Message-Id: <8f07132478469b35fb50a4706691e2b56b10a67b.camel@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
* qdev: add "check if address free" callback for busesPaolo Bonzini2020-10-121-1/+1
| | | | | | | | | | | Check if an address is free on the bus before plugging in the device. This makes it possible to do the check without any side effects, and to detect the problem early without having to do it in the realize callback. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201006123904.610658-5-mlevitsk@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* error: Remove NULL checks on error_propagate() calls (again)Markus Armbruster2020-10-091-6/+2Star
| | | | | | | | | | | | | | | Patch created mechanically by rerunning: $ spatch --sp-file scripts/coccinelle/error_propagate_null.cocci \ --macro-file scripts/cocci-macro-file.h \ --use-gitgrep . Cc: Jens Freimann <jfreimann@redhat.com> Cc: Hailiang Zhang <zhang.zhanghailiang@huawei.com> Cc: Juan Quintela <quintela@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200722084048.1726105-4-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
* hw/net/can: Correct Kconfig dependenciesPavel Pisa2020-09-301-4/+3Star
| | | | | | | | | | The original CAN_PCI config option enables multiple SJA1000 PCI boards emulation build. These boards bridge SJA1000 into I/O or memory address space of the host CPU and depend on SJA1000 emulation. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Message-Id: <dd332de687bfe52bbec37f5de1d861fb8e620d74.1600069689.git.pisa@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw/net/can: CTU CAN FD IP open hardware core emulation.Jan Charvat2020-09-305-0/+1117
| | | | | | | | | | | | | | | | | | | | | | | | | | | The implementation of the model of complete open-source/design/hardware CAN FD controller. The IP core project has been started and is maintained by Ondrej Ille at Czech Technical University in Prague. CTU CAN FD project pages: https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core CAN bus CTU FEE Projects Listing page: http://canbus.pages.fel.cvut.cz/ The core is mapped to PCIe card same as on one of its real hardware adaptations. The device implementing two CTU CAN FD ip cores is instantiated after CAN bus definition -object can-bus,id=canbus0-bus by QEMU parameters -device ctucan_pci,canbus0=canbus0-bus,canbus1=canbus0-bus Signed-off-by: Jan Charvat <charvj10@fel.cvut.cz> Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Message-Id: <23e3ca4dcb2cc9900991016910a6cab7686c0e31.1600069689.git.pisa@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw/net/can/ctucafd: Add CTU CAN FD core register definitions.Jan Charvat2020-09-302-0/+1160
| | | | | | | | | | | | | | | | | | | | | | | | | Definitions of registers and CAN FD frame message box of CTU CAN FD IP core are generated the specification in CACTUS/IP-XACT format. CTU CAN FD IP core repository https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core The location of the CTU CAN IP core specification within IP core design spec/CTU/ip/CAN_FD_IP_Core/2.1/CAN_FD_IP_Core.2.1.xml The header files are generated by pyXact_generator designed by Ondrej Ille which is based on ipyxact_parser. The specification is source of header files for driver and emulation, documentation and VHDL registers map implementation. Signed-off-by: Jan Charvat <charvj10@fel.cvut.cz> Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Message-Id: <97ae620f724bf1d76f127aaf628f7aec3af0a11c.1600069689.git.pisa@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw/net/can: sja1000 ignore CAN FD framesJan Charvat2020-09-301-6/+23
| | | | | | | | Signed-off-by: Jan Charvat <charvj10@fel.cvut.cz> Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Reviewed-by: Vikram Garhwal <fnu.vikram@xilinx.com> Message-Id: <48d9ebf6b64e7652851c12fe4566e06b44803372.1600069689.git.pisa@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* net/can: Initial host SocketCan support for CAN FD.Jan Charvat2020-09-301-0/+2
| | | | | | | | Signed-off-by: Jan Charvat <charvj10@fel.cvut.cz> Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Reviewed-by: Vikram Garhwal <fnu.vikram@xilinx.com> Message-Id: <41383d4eb3f35586c696a8e29c4dff4031a81338.1600069689.git.pisa@cmp.felk.cvut.cz> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* qemu/atomic.h: rename atomic_ to qatomic_Stefan Hajnoczi2020-09-231-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clang's C11 atomic_fetch_*() functions only take a C11 atomic type pointer argument. QEMU uses direct types (int, etc) and this causes a compiler error when a QEMU code calls these functions in a source file that also included <stdatomic.h> via a system header file: $ CC=clang CXX=clang++ ./configure ... && make ../util/async.c:79:17: error: address argument to atomic operation must be a pointer to _Atomic type ('unsigned int *' invalid) Avoid using atomic_*() names in QEMU's atomic.h since that namespace is used by <stdatomic.h>. Prefix QEMU's APIs with 'q' so that atomic.h and <stdatomic.h> can co-exist. I checked /usr/include on my machine and searched GitHub for existing "qatomic_" users but there seem to be none. This patch was generated using: $ git grep -h -o '\<atomic\(64\)\?_[a-z0-9_]\+' include/qemu/atomic.h | \ sort -u >/tmp/changed_identifiers $ for identifier in $(</tmp/changed_identifiers); do sed -i "s%\<$identifier\>%q$identifier%g" \ $(git grep -I -l "\<$identifier\>") done I manually fixed line-wrap issues and misaligned rST tables. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200923105646.47864-1-stefanha@redhat.com>
* Use OBJECT_DECLARE_SIMPLE_TYPE when possibleEduardo Habkost2020-09-1819-56/+19Star
| | | | | | | | | | | | | This converts existing DECLARE_INSTANCE_CHECKER usage to OBJECT_DECLARE_SIMPLE_TYPE when possible. $ ./scripts/codeconverter/converter.py -i \ --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]') Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20200916182519.415636-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* Merge remote-tracking branch ↵Peter Maydell2020-09-131-3/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/alistair/tags/pull-riscv-to-apply-20200910' into staging This PR includes multiple fixes and features for RISC-V: - Fixes a bug in printing trap causes - Allows 16-bit writes to the SiFive test device. This fixes the failure to reboot the RISC-V virt machine - Support for the Microchip PolarFire SoC and Icicle Kit - A reafactor of RISC-V code out of hw/riscv # gpg: Signature made Thu 10 Sep 2020 19:08:06 BST # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20200910: (30 commits) hw/riscv: Sort the Kconfig options in alphabetical order hw/riscv: Drop CONFIG_SIFIVE hw/riscv: Always build riscv_hart.c hw/riscv: Move sifive_test model to hw/misc hw/riscv: Move sifive_uart model to hw/char hw/riscv: Move riscv_htif model to hw/char hw/riscv: Move sifive_plic model to hw/intc hw/riscv: Move sifive_clint model to hw/intc hw/riscv: Move sifive_gpio model to hw/gpio hw/riscv: Move sifive_u_otp model to hw/misc hw/riscv: Move sifive_u_prci model to hw/misc hw/riscv: Move sifive_e_prci model to hw/misc hw/riscv: sifive_u: Connect a DMA controller hw/riscv: clint: Avoid using hard-coded timebase frequency hw/riscv: microchip_pfsoc: Hook GPIO controllers hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23 hw/net: cadence_gem: Add a new 'phy-addr' property hw/riscv: microchip_pfsoc: Connect a DMA controller hw/dma: Add SiFive platform DMA controller emulation ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # hw/riscv/trace-events
| * hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23Bin Meng2020-09-101-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When cadence_gem model was created for Xilinx boards, the PHY address was hard-coded to 23 in the GEM model. Now that we have introduced a property we can use that to tell GEM model what our PHY address is. Change all boards' GEM 'phy-addr' property value to 23, and set the PHY address default value to 0 in the GEM model. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-13-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| * hw/net: cadence_gem: Add a new 'phy-addr' propertyBin Meng2020-09-101-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the PHY address of the PHY connected to GEM is hard-coded to either 23 (BOARD_PHY_ADDRESS) or 0. This might not be the case for all boards. Add a new 'phy-addr' property so that board can specify the PHY address for each GEM instance. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-12-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
* | Merge remote-tracking branch ↵Peter Maydell2020-09-123-4/+2Star
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/vivier2/tags/trivial-branch-for-5.2-pull-request' into staging trivial patches pull request 20200911 # gpg: Signature made Fri 11 Sep 2020 20:32:27 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-5.2-pull-request: target/i386/kvm: Add missing fallthrough comment util/hexdump: Reorder qemu_hexdump() arguments util/hexdump: Convert to take a void pointer argument hw/arm/pxa2xx: Add missing fallthrough comment target/i386/kvm: Rename host_tsx_blacklisted() as host_tsx_broken() test-vmstate: remove unnecessary code in match_interval_mapping_node hw: hyperv: vmbus: Fix 32bit compilation kconfig: fix comment referring to old Makefiles meson.build: tweak sdl-image error message hw/net/e1000e: Remove duplicated write handler for FLSWDATA register hw/net/e1000e: Remove overwritten read handler for STATUS register Makefile: Skip the meson subdir in cscope/TAGS/ctags Makefile: Drop extra phony cscope hw/gpio/max7310: Replace disabled printf() by qemu_log_mask(UNIMP) hw/gpio/omap_gpio: Replace fprintf() by qemu_log_mask(GUEST_ERROR) hw/acpi/tco: Remove unused definitions hw/isa/isa-bus: Replace hw_error() by assert() hw/mips/fuloong2e: Convert pointless error message to an assert() Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # net/colo-compare.c
| * | util/hexdump: Reorder qemu_hexdump() argumentsPhilippe Mathieu-Daudé2020-09-112-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | qemu_hexdump()'s pointer to the buffer and length of the buffer are closely related arguments but are widely separated in the argument list order (also, the format of <stdio.h> function prototypes is usually to have the FILE* argument coming first). Reorder the arguments as "fp, prefix, buf, size" which is more logical. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com> Message-Id: <20200822180950.1343963-3-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * | util/hexdump: Convert to take a void pointer argumentPhilippe Mathieu-Daudé2020-09-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most uses of qemu_hexdump() do not take an array of char as input, forcing use of cast. Since we can use this helper to dump any kind of buffer, use a pointer to void argument instead. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> Reviewed-by: Stefano Garzarella <sgarzare@redhat.com> Message-Id: <20200822180950.1343963-2-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * | hw/net/e1000e: Remove duplicated write handler for FLSWDATA registerPhilippe Mathieu-Daudé2020-09-101-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The FLSWDATA register writeop handler is initialized twice: 3067 #define e1000e_putreg(x) [x] = e1000e_mac_writereg 3068 typedef void (*writeops)(E1000ECore *, int, uint32_t); 3069 static const writeops e1000e_macreg_writeops[] = { .... 3102 e1000e_putreg(FLSWDATA), .... 3145 e1000e_putreg(FLSWDATA), To avoid confusion, remove the duplicated initialization. Fixes: 6f3fbe4ed0 ("net: Introduce e1000e device emulation") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Li Qiang <liq3ea@gmail.com> Message-Id: <20200904131402.590055-3-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * | hw/net/e1000e: Remove overwritten read handler for STATUS registerPhilippe Mathieu-Daudé2020-09-101-1/+0Star
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The STATUS register readop handler is initialized first with the generic e1000e_mac_readreg() handler: 2861 #define e1000e_getreg(x) [x] = e1000e_mac_readreg 2862 typedef uint32_t (*readops)(E1000ECore *, int); 2863 static const readops e1000e_macreg_readops[] = { .... 2919 e1000e_getreg(STATUS), Then overwritten with the specific e1000e_get_status handler: 3018 [STATUS] = e1000e_get_status, To avoid confusion, remove the overwritten initialization. 6f3fbe4ed0 ("net: Introduce e1000e device emulation") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Li Qiang <liq3ea@gmail.com> Message-Id: <20200904131402.590055-2-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* | xilinx_axienet: Use typedef name for instance_sizeEduardo Habkost2020-09-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | This makes the code consistent with the rest of QOM code in QEMU, and will make automated conversion to type declaration macros simpler. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20200824215936.2961951-5-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* | Use DECLARE_*CHECKER* macrosEduardo Habkost2020-09-0927-54/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* | Move QOM typedefs and add missing includesEduardo Habkost2020-09-0927-50/+99
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE. Patch generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]') which will split "typdef struct { ... } TypedefName" declarations. Followed by: $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]') which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20200901' ↵Peter Maydell2020-09-031-27/+68
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging Various fixes of Aspeed machines : * New Supermicro X11 BMC machine (Erik) * Fixed valid access size on AST2400 SCU * Improved robustness of the ftgmac100 model. * New flash models in m25p80 (Igor) * Fixed reset sequence of SDHCI/eMMC controllers * Improved support of the AST2600 SDMC (Joel) * Couple of SMC cleanups # gpg: Signature made Tue 01 Sep 2020 13:39:20 BST # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * remotes/legoater/tags/pull-aspeed-20200901: hw: add a number of SPI-flash's of m25p80 family arm: aspeed: add strap define `25HZ` of AST2500 aspeed/smc: Open AHB window of the second chip of the AST2600 FMC controller aspeed/sdmc: Simplify calculation of RAM bits aspeed/sdmc: Allow writes to unprotected registers aspeed/sdmc: Perform memory training ftgmac100: Improve software reset ftgmac100: Fix integer overflow in ftgmac100_do_tx() ftgmac100: Check for invalid len and address before doing a DMA transfer ftgmac100: Change interrupt status when a DMA error occurs ftgmac100: Fix interrupt status "Packet moved to RX FIFO" ftgmac100: Fix interrupt status "Packet transmitted on ethernet" ftgmac100: Fix registers that can be read aspeed/sdhci: Fix reset sequence aspeed/smc: Fix max_slaves of the legacy SMC device aspeed/smc: Fix MemoryRegionOps definition hw/arm/aspeed: Add board model for Supermicro X11 BMC aspeed/scu: Fix valid access size on AST2400 m25p80: Add support for n25q512ax3 m25p80: Return the JEDEC ID twice for mx25l25635e Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * ftgmac100: Improve software resetCédric Le Goater2020-09-011-5/+13
| | | | | | | | | | | | | | | | | | | | The software reset of the MAC needs a finer granularity. Some settings in MACCR are kept. Cc: Frederic Konrad <konrad.frederic@yahoo.fr> Fixes: bd44300d1afc ("net: add FTGMAC100 support") Message-Id: <20200819100956.2216690-16-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * ftgmac100: Fix integer overflow in ftgmac100_do_tx()Cédric Le Goater2020-09-011-16/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When inserting the VLAN tag in packets, memmove() can generate an integer overflow for packets whose length is less than 12 bytes. Move the VLAN insertion when the last segment of the frame is reached and check length against the size of the ethernet header (14 bytes) to avoid the crash. Return FTGMAC100_INT_XPKT_LOST status if the frame is too small. This seems like a good modeling choice even if Aspeed does not specify anything in that case. Cc: Frederic Konrad <konrad.frederic@yahoo.fr> Cc: Mauro Matteo Cascella <mcascell@redhat.com> Reported-by: Ziming Zhang <ezrakiez@gmail.com> Message-Id: <20200819100956.2216690-15-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * ftgmac100: Check for invalid len and address before doing a DMA transferCédric Le Goater2020-09-011-0/+9
| | | | | | | | | | | | | | | | | | | | | | According to the Aspeed specs, no interrupts are raised in that case but a "Tx-packets lost" status seems like a good modeling choice for all implementations. It is covered by the Linux kernel. Cc: Frederic Konrad <konrad.frederic@yahoo.fr> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-Id: <20200819100956.2216690-14-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * ftgmac100: Change interrupt status when a DMA error occursCédric Le Goater2020-09-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The model uses today the "Normal priority transmit buffer unavailable" interrupt status which it is not appropriate. According to the Aspeed specs, no interrupts are raised in that case. An "AHB error" status seems like a better modeling choice for all implementations since it is covered by the Linux kernel. Cc: Frederic Konrad <konrad.frederic@yahoo.fr> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-Id: <20200819100956.2216690-13-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * ftgmac100: Fix interrupt status "Packet moved to RX FIFO"Cédric Le Goater2020-09-011-2/+1Star
| | | | | | | | | | | | | | | | | | | | As we don't model the RX or TX FIFO, raise the "Packet moved to RX FIFO" interrupt status bit as soon as we are handling a RX packet. Cc: Frederic Konrad <konrad.frederic@yahoo.fr> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-Id: <20200819100956.2216690-12-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * ftgmac100: Fix interrupt status "Packet transmitted on ethernet"Cédric Le Goater2020-09-011-3/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The second field of the TX descriptor has a set of flags to choose when the transmit interrupt is raised : after the packet has been sent on the ethernet or after it has been moved into the TX FIFO. But we don't model that today. Simply raise the "Packet transmitted on ethernet" interrupt status bit as soon as the packet is sent by QEMU. Cc: Frederic Konrad <konrad.frederic@yahoo.fr> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-Id: <20200819100956.2216690-11-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
| * ftgmac100: Fix registers that can be readCédric Le Goater2020-09-011-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Receive Ring Base Address Register (RXR_BADR) and the Normal Priority Transmit Receive Ring Base Address Register (NPTXR_BADR) can also be read. Cc: Frederic Konrad <konrad.frederic@yahoo.fr> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Joel Stanley <joel@jms.id.au> Message-Id: <20200819100956.2216690-10-clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
* | hw/net/virtio-net:Remove redundant statement in virtio_net_rsc_tcp_ctrl_check()Chen Qun2020-09-011-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clang static code analyzer show warning: hw/net/virtio-net.c:2077:5: warning: Value stored to 'tcp_flag' is never read tcp_flag &= VIRTIO_NET_TCP_FLAG; ^ ~~~~~~~~~~~~~~~~~~~ The 'VIRTIO_NET_TCP_FLAG' is '0x3F'. The last ‘tcp_flag’ assignment statement is the same as that of the first two statements. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20200827110311.164316-7-kuhn.chenqun@huawei.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* | hw/net/xilinx_axienet: Remove unused codePhilippe Mathieu-Daudé2020-09-011-23/+0Star
| | | | | | | | | | | | | | | | | | | | | | Most of the MDIOBus fields are unused. The ADVERTISE_10HALF definition is unused. Remove unused code. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-Id: <20200814133007.16850-1-f4bug@amsat.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* | hw/net/can: Add missing fallthrough statementsThomas Huth2020-09-011-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Add fallthrough annotations to be able to compile the code without warnings when using -Wimplicit-fallthrough in our CFLAGS. Looking at the code, it seems like the fallthrough is indeed intended here, so the comments should be appropriate. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Message-Id: <20200630075520.29825-1-thuth@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* | hw: Remove superfluous breaksLiao Pingfang2020-09-011-2/+0Star
|/ | | | | | | | | | | Remove superfluous breaks, as there is a "return" before them. Signed-off-by: Liao Pingfang <liao.pingfang@zte.com.cn> Signed-off-by: Yi Wang <wang.yi59@zte.com.cn> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <1594631126-36631-1-git-send-email-wang.yi59@zte.com.cn> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* Merge remote-tracking branch ↵Peter Maydell2020-08-281-16/+30
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/pmaydell/tags/pull-target-arm-20200828' into staging target-arm queue: * target/arm: Cleanup and refactoring preparatory to SVE2 * armsse: Define ARMSSEClass correctly * hw/misc/unimp: Improve information provided in log messages * hw/qdev-clock: Avoid calling qdev_connect_clock_in after DeviceRealize * hw/arm/xilinx_zynq: Call qdev_connect_clock_in() before DeviceRealize * hw/net/allwinner-sun8i-emac: Use AddressSpace for DMA transfers * hw/sd/allwinner-sdhost: Use AddressSpace for DMA transfers * target/arm: Fill in the WnR syndrome bit in mte_check_fail * target/arm: Clarify HCR_EL2 ARMCPRegInfo type * hw/arm/musicpal: Use AddressSpace for DMA transfers * hw/clock: Minor cleanups * hw/arm/sbsa-ref: fix typo breaking PCIe IRQs # gpg: Signature made Fri 28 Aug 2020 10:23:02 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200828: (35 commits) target/arm: Convert sq{, r}dmulh to gvec for aa64 advsimd target/arm: Convert integer multiply-add (indexed) to gvec for aa64 advsimd target/arm: Convert integer multiply (indexed) to gvec for aa64 advsimd target/arm: Generalize inl_qrdmlah_* helper functions target/arm: Tidy SVE tszimm shift formats target/arm: Split out gen_gvec_ool_zz target/arm: Split out gen_gvec_ool_zzz target/arm: Split out gen_gvec_ool_zzp target/arm: Merge helper_sve_clr_* and helper_sve_movz_* target/arm: Split out gen_gvec_ool_zzzp target/arm: Use tcg_gen_gvec_bitsel for trans_SEL_pppp target/arm: Clean up 4-operand predicate expansion target/arm: Merge do_vector2_p into do_mov_p target/arm: Rearrange {sve,fp}_check_access assert target/arm: Split out gen_gvec_fn_zzz, do_zzz_fn target/arm: Split out gen_gvec_fn_zz qemu/int128: Add int128_lshift armsse: Define ARMSSEClass correctly hw/misc/unimp: Display the offset with width of the region size hw/misc/unimp: Display the value with width of the access size ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-18 11:46:59 +0100