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path: root/hw/ppc/pnv.c
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* ppc/pnv: Introduce PowerNV machines with fixed CPU modelsCédric Le Goater2019-08-291-7/+63
* ppc/pnv: Generate phandle for the "interrupt-parent" propertyCédric Le Goater2019-08-291-0/+5
* ppc/pnv: Set default ram size to 1.75GBJoel Stanley2019-08-291-1/+5
* sysemu: Split sysemu/runstate.h off sysemu/sysemu.hMarkus Armbruster2019-08-161-0/+1
* Include hw/boards.h a bit lessMarkus Armbruster2019-08-161-0/+1
* Include hw/qdev-properties.h lessMarkus Armbruster2019-08-161-0/+1
* Include hw/hw.h exactly where neededMarkus Armbruster2019-08-161-1/+0Star
* Include sysemu/reset.h a lot lessMarkus Armbruster2019-08-161-0/+1
* hw/ppc: Replace global smp variables with machine smp propertiesLike Xu2019-07-051-2/+4
* machine: Refactor smp-related call chains to pass MachineStateLike Xu2019-07-051-2/+1Star
* ppc/pnv: remove xscom_base field from PnvChipCédric Le Goater2019-07-021-10/+0Star
* ppc/pnv: fix XSCOM MMIO base address for P9 machines with multiple chipsCédric Le Goater2019-07-021-8/+16
* Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.1-20190612' into...Peter Maydell2019-06-121-0/+2
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| * ppc/pnv: activate the "dumpdtb" option on the powernv machineCédric Le Goater2019-06-121-0/+2
* | Include qemu-common.h exactly where neededMarkus Armbruster2019-06-121-0/+1
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* ppc/pnv: introduce new skiboot platform propertiesCédric Le Goater2019-05-291-3/+10
* hw/ppc/pnv: Use object_initialize_child for correct reference countingPhilippe Mathieu-Daudé2019-05-241-8/+4Star
* ppc/pnv: Use local_err variable in pnv_chip_power9_intc_create()Greg Kurz2019-03-191-1/+1
* ppc/pnv: add a "ibm,opal/power-mgt" device tree node on POWER9Cédric Le Goater2019-03-121-0/+15
* ppc/pnv: POWER9 XSCOM quad supportCédric Le Goater2019-03-121-1/+37
* ppc/pnv: add a OCC model for POWER9Cédric Le Goater2019-03-121-0/+13
* ppc/pnv: add a OCC model classCédric Le Goater2019-03-121-1/+1
* ppc/pnv: add a LPC Controller model for POWER9Cédric Le Goater2019-03-121-1/+21
* ppc/pnv: add a 'dt_isa_nodename' to the chipCédric Le Goater2019-03-121-13/+5Star
* ppc/pnv: add a LPC Controller class modelCédric Le Goater2019-03-121-1/+1
* ppc/pnv: add a PSI bridge model for POWER9Cédric Le Goater2019-03-121-0/+18
* ppc/pnv: add a PSI bridge class modelCédric Le Goater2019-03-121-2/+4
* ppc/pnv: introduce a new pic_print_info() operation to the chip modelCédric Le Goater2019-03-121-3/+24
* ppc/pnv: introduce a new dt_populate() operation to the chip modelCédric Le Goater2019-03-121-2/+25
* ppc/pnv: add a XIVE interrupt controller model for POWER9Cédric Le Goater2019-03-121-1/+43
* ppc/pnv: change the CPU machine_data presenter type to Object *Cédric Le Goater2019-03-121-3/+3
* ppc: externalize ppc_get_vcpu_by_pir()Cédric Le Goater2019-03-121-16/+0Star
* ppc/pnv: use IEC binary prefixes to represent sizesMurilo Opsfelder Araujo2019-02-261-2/+2
* ppc/pnv: add INITRD_MAX_SIZE constantMurilo Opsfelder Araujo2019-02-261-1/+2
* ppc/pnv: increase kernel size limit to 256MiBMurilo Opsfelder Araujo2019-02-261-1/+2
* hw/ppc: Use object_initialize_child for correct reference countingThomas Huth2019-02-251-6/+6
* ppc/pnv: introduce a CPU machine_dataCédric Le Goater2019-02-041-3/+4
* ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the CPUCédric Le Goater2019-01-081-3/+3
* spapr: modify the prototype of the cpu_intc_create() methodCédric Le Goater2019-01-081-7/+16
* hw: Directly use "qemu/units.h" instead of "qemu/cutils.h"Philippe Mathieu-Daudé2018-07-021-1/+1
* hw: Use IEC binary prefix definitions from "qemu/units.h"Philippe Mathieu-Daudé2018-07-021-2/+2
* ppc/pnv: consolidate the creation of the ISA bus device treeCédric Le Goater2018-06-211-28/+23Star
* ppc/pnv: introduce Pnv8Chip and Pnv9Chip modelsCédric Le Goater2018-06-211-102/+179
* ppc/pnv: introduce a new isa_create() operation to the chip modelCédric Le Goater2018-06-211-15/+19
* ppc/pnv: introduce a new intc_create() operation to the chip modelCédric Le Goater2018-06-211-2/+19
* ppc/pnv: introduce a pnv_chip_core_realize() routineCédric Le Goater2018-06-161-10/+22
* pnv_core: Allocate cpu thread objects individuallyDavid Gibson2018-06-161-2/+2
* target/ppc: Fold slb_nr into PPCHash64OptionsDavid Gibson2018-04-271-1/+1
* target/ppc: Move 1T segment and AMR options to PPCHash64OptionsDavid Gibson2018-04-271-1/+2
* target/ppc: Pass cpu instead of env to ppc_create_page_sizes_prop()David Gibson2018-04-271-2/+2
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