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* Include hw/qdev-properties.h lessMarkus Armbruster2019-08-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | In my "build everything" tree, changing hw/qdev-properties.h triggers a recompile of some 2700 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h). Many places including hw/qdev-properties.h (directly or via hw/qdev.h) actually need only hw/qdev-core.h. Include hw/qdev-core.h there instead. hw/qdev.h is actually pointless: all it does is include hw/qdev-core.h and hw/qdev-properties.h, which in turn includes hw/qdev-core.h. Replace the remaining uses of hw/qdev.h by hw/qdev-properties.h. While there, delete a few superfluous inclusions of hw/qdev-core.h. Touching hw/qdev-properties.h now recompiles some 1200 objects. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: "Daniel P. Berrangé" <berrange@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20190812052359.30071-22-armbru@redhat.com>
* Include hw/hw.h exactly where neededMarkus Armbruster2019-08-161-1/+0Star
| | | | | | | | | | | | | | | | In my "build everything" tree, changing hw/hw.h triggers a recompile of some 2600 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h). The previous commits have left only the declaration of hw_error() in hw/hw.h. This permits dropping most of its inclusions. Touching it now recompiles less than 200 objects. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190812052359.30071-19-armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* Include migration/vmstate.h lessMarkus Armbruster2019-08-161-0/+1
| | | | | | | | | | | | | | | | | | In my "build everything" tree, changing migration/vmstate.h triggers a recompile of some 2700 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h). hw/hw.h supposedly includes it for convenience. Several other headers include it just to get VMStateDescription. The previous commit made that unnecessary. Include migration/vmstate.h only where it's still needed. Touching it now recompiles only some 1600 objects. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20190812052359.30071-16-armbru@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
* Include hw/irq.h a lot lessMarkus Armbruster2019-08-161-0/+1
| | | | | | | | | | | | | | | | | | | In my "build everything" tree, changing hw/irq.h triggers a recompile of some 5400 out of 6600 objects (not counting tests and objects that don't depend on qemu/osdep.h). hw/hw.h supposedly includes it for convenience. Several other headers include it just to get qemu_irq and.or qemu_irq_handler. Move the qemu_irq and qemu_irq_handler typedefs from hw/irq.h to qemu/typedefs.h, and then include hw/irq.h only where it's still needed. Touching it now recompiles only some 500 objects. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190812052359.30071-13-armbru@redhat.com>
* Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster2019-06-121-0/+1
| | | | | | | | | Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-4-armbru@redhat.com> [Rebased with conflicts resolved automatically, except for hw/usb/dev-hub.c hw/misc/exynos4210_rng.c hw/misc/bcm2835_rng.c hw/misc/aspeed_scu.c hw/display/virtio-vga.c hw/arm/stm32f205_soc.c; ui/cocoa.m fixed up]
* hw/sd/sdhci: Move PCI-related code into a separate fileThomas Huth2019-03-121-93/+5Star
| | | | | | | | | | | | | | Some machines have an SDHCI device, but no PCI. To be able to compile hw/sd/sdhci.c without CONFIG_PCI, we must not call functions like pci_get_address_space() and pci_allocate_irq() there. Thus move the PCI-related code into a separate file. This is required for the new Kconfig-like build system, e.g. it is needed if a user wants to compile a QEMU binary with just one machine that has SDHCI, but no PCI, like the ARM "raspi" machines for example. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
* hw/sd/sdhci: Don't leak memory region in sdhci_sysbus_realize()Peter Maydell2018-12-141-4/+1Star
| | | | | | | | | | | | | | | | | | | | In sdhci_sysbus_realize() we override the initialization of s->iomem that sdhci_common_realize() performs. However we don't destroy the old memory region before reinitializing it, which means that the memory allocated for mr->name in memory_region_do_init() is leaked. Since sdhci_initfn() already initializes s->io_ops to &sdhci_mmio_ops, always use that in sdhci_common_realize() and remove the now-unnecessary reinitialization of the MMIO region from sdhci_sysbus_realize(). Spotted by clang's leak sanitizer. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20181204132952.2601-4-peter.maydell@linaro.org
* sdhci: add i.MX SD Stable Clock bitHans-Erik Floryd2018-08-201-0/+8
| | | | | | | | | | | Add the ESDHC PRSSTAT_SDSTB bit, using the value of SDHC_CLOCK_INT_STABLE. Freescale recommends checking this bit when changing clock frequency. Signed-off-by: Hans-Erik Floryd <hans-erik.floryd@rt-labs.com> Message-id: 1534507843-4251-1-git-send-email-hans-erik.floryd@rt-labs.com [PMM: fixed indentation] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/sd: Use the IEC binary prefix definitionsPhilippe Mathieu-Daudé2018-07-021-3/+3
| | | | | | | | | | | | | | It eases code review, unit is explicit. Patch generated using: $ git grep -E '(1024|2048|4096|8192|(<<|>>).?(10|20|30))' hw/ include/hw/ and modified manually. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180625124238.25339-37-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw: Use IEC binary prefix definitions from "qemu/units.h"Philippe Mathieu-Daudé2018-07-021-1/+1
| | | | | | | | | | | | | Code change produced with: $ git ls-files | egrep '\.[ch]$' | \ xargs sed -i -e 's/\(\W[KMGTPE]\)_BYTE/\1iB/g' Suggested-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: David Gibson <david@gibson.dropbear.id.au> (ppc parts) Message-Id: <20180625124238.25339-6-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* sdcard: Use the ldst APIPhilippe Mathieu-Daudé2018-06-291-10/+5Star
| | | | | | | | | | | | | The load/store API will ease further code movement. Per the Physical Layer Simplified Spec. "3.6 Bus Protocol": "In the CMD line the Most Significant Bit (MSB) is transmitted first, the Least Significant Bit (LSB) is the last." Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw: Do not include "sysemu/blockdev.h" if it is not necessaryPhilippe Mathieu-Daudé2018-06-011-1/+0Star
| | | | | | | | | | | | | | | | | Remove those unneeded includes to speed up the compilation process a little bit. Code change produced with: $ git grep '#include "sysemu/blockdev.h"' | \ cut -d: -f-1 | \ xargs egrep -L "(BlockInterfaceType|DriveInfo|drive_get|blk_legacy_dinfo|blockdev_mark_auto_del)" | \ xargs sed -i.bak '/#include "sysemu\/blockdev.h"/d' Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180528232719.4721-15-f4bug@amsat.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw: Do not include "sysemu/block-backend.h" if it is not necessaryPhilippe Mathieu-Daudé2018-06-011-1/+0Star
| | | | | | | | | | | Remove those unneeded includes to speed up the compilation process a little bit. (Continue 7eceff5b5a1fa cleanup) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180528232719.4721-13-f4bug@amsat.org> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* sdhci: fix incorrect use of Error *Paolo Bonzini2018-03-231-2/+2
| | | | | | | | | | Detected by Coverity (CID 1386072, 1386073, 1386076, 1386077). local_err was unused, and this made the static analyzer unhappy. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 20180320151355.25854-1-pbonzini@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: Fix a typo in commentPhilippe Mathieu-Daudé2018-03-091-2/+2
| | | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180309153654.13518-8-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: add Spec v4.2 register definitionsPhilippe Mathieu-Daudé2018-02-131-1/+15
| | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20180208164818.7961-31-f4bug@amsat.org>
* sdhci: implement CMD/DAT[] fields in the Present State registerPhilippe Mathieu-Daudé2018-02-131-0/+4
| | | | | | | | [based on a patch from Alistair Francis <alistair.francis@xilinx.com> from qemu/xilinx tag xilinx-v2015.2] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-23-f4bug@amsat.org>
* sdhci: implement UHS-I voltage switchPhilippe Mathieu-Daudé2018-02-131-1/+11
| | | | | | | | [based on a patch from Alistair Francis <alistair.francis@xilinx.com> from qemu/xilinx tag xilinx-v2015.2] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-22-f4bug@amsat.org>
* sdhci: implement the Host Control 2 register (tuning sequence)Philippe Mathieu-Daudé2018-02-131-3/+19
| | | | | | | | [based on a patch from Alistair Francis <alistair.francis@xilinx.com> from qemu/xilinx tag xilinx-v2015.2] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-20-f4bug@amsat.org>
* sdhci: rename the hostctl1 registerPhilippe Mathieu-Daudé2018-02-131-21/+21
| | | | | | | | As per the Spec v3.00 Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-19-f4bug@amsat.org>
* sdhci: add support for v3 capabilitiesPhilippe Mathieu-Daudé2018-02-131-2/+52
| | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-18-f4bug@amsat.org>
* sdhci: check Spec v2 capabilities (DMA and 64-bit bus)Philippe Mathieu-Daudé2018-02-131-4/+15
| | | | | | | | Incorrect value will throw an error. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-14-f4bug@amsat.org>
* sdhci: Fix 64-bit ADMA2Sai Pavan Boddu2018-02-131-2/+2
| | | | | | | | | | The 64-bit ADMA address is not converted to the cpu endianes correctly. This patch fixes the issue and uses a valid mask for the attribute data. Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com> [AF: Re-write commit message] Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-13-f4bug@amsat.org>
* sdhci: replace DMA magic value by BLOCK_SIZE_MASKPhilippe Mathieu-Daudé2018-02-131-8/+10
| | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-12-f4bug@amsat.org>
* sdhci: check the Spec v1 capabilities correctnessPhilippe Mathieu-Daudé2018-02-131-1/+96
| | | | | | | | | | Incorrect value will throw an error. Note than Spec v2 is supported by default. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-11-f4bug@amsat.org>
* sdhci: simplify sdhci_get_fifolen()Philippe Mathieu-Daudé2018-02-131-15/+5Star
| | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-10-f4bug@amsat.org>
* sdhci: use a numeric value for the default CAPAB registerPhilippe Mathieu-Daudé2018-02-131-58/+16Star
| | | | | | | | using many #defines is not portable when scaling to different HCI. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-9-f4bug@amsat.org>
* sdhci: add a 'spec_version property' (default to v2)Philippe Mathieu-Daudé2018-02-131-4/+23
| | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-8-f4bug@amsat.org>
* sdhci: use error_propagate(local_err) in realize()Philippe Mathieu-Daudé2018-02-131-2/+6
| | | | | | | | avoid the "errp && *errp" pattern (not recommended in "qapi/error.h" comments). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-2-f4bug@amsat.org>
* Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2018-02-07-v4' ↵Peter Maydell2018-02-091-1/+0Star
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging Miscellaneous patches for 2018-02-07 # gpg: Signature made Fri 09 Feb 2018 12:52:51 GMT # gpg: using RSA key 3870B400EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-misc-2018-02-07-v4: Move include qemu/option.h from qemu-common.h to actual users Drop superfluous includes of qapi/qmp/qjson.h Drop superfluous includes of qapi/qmp/dispatch.h Include qapi/qmp/qnull.h exactly where needed Include qapi/qmp/qnum.h exactly where needed Include qapi/qmp/qbool.h exactly where needed Include qapi/qmp/qstring.h exactly where needed Include qapi/qmp/qdict.h exactly where needed Include qapi/qmp/qlist.h exactly where needed Include qapi/qmp/qobject.h exactly where needed qdict qlist: Make most helper macros functions Eliminate qapi/qmp/types.h Typedef the subtypes of QObject in qemu/typedefs.h, too Include qmp-commands.h exactly where needed Drop superfluous includes of qapi/qmp/qerror.h Include qapi/error.h exactly where needed Drop superfluous includes of qapi-types.h and test-qapi-types.h Clean up includes Use #include "..." for our own headers, <...> for others vnc: use stubs for CONFIG_VNC=n dummy functions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * Include qapi/error.h exactly where neededMarkus Armbruster2018-02-091-1/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This cleanup makes the number of objects depending on qapi/error.h drop from 1910 (out of 4743) to 1612 in my "build everything" tree. While there, separate #include from file comment with a blank line, and drop a useless comment on why qemu/osdep.h is included first. Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20180201111846.21846-5-armbru@redhat.com> [Semantic conflict with commit 34e304e975 resolved, OSX breakage fixed]
* | sdhci: Add i.MX specific subtype of SDHCIAndrey Smirnov2018-02-091-1/+229
|/ | | | | | | | | | | | | | | | | | | | | | IP block found on several generations of i.MX family does not use vanilla SDHCI implementation and it comes with a number of quirks. Introduce i.MX SDHCI subtype of SDHCI block to add code necessary to support unmodified Linux guest driver. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Jason Wang <jasowang@redhat.com> Cc: Philippe Mathieu-Daudé <f4bug@amsat.org> Cc: Marcel Apfelbaum <marcel.apfelbaum@zoho.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Cc: yurovsky@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [PMM: define and use ESDHC_UNDOCUMENTED_REG27] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: fix a NULL pointer dereference due to uninitialized AddresSpace objectPhilippe Mathieu-Daudé2018-01-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | missed in 60765b6ceeb4. Thread 1 "qemu-system-aarch64" received signal SIGSEGV, Segmentation fault. address_space_init (as=0x0, root=0x55555726e410, name=name@entry=0x555555e3f0a7 "sdhci-dma") at memory.c:3050 3050 as->root = root; (gdb) bt #0 address_space_init (as=0x0, root=0x55555726e410, name=name@entry=0x555555e3f0a7 "sdhci-dma") at memory.c:3050 #1 0x0000555555af62c3 in sdhci_sysbus_realize (dev=<optimized out>, errp=0x7fff7f931150) at hw/sd/sdhci.c:1564 #2 0x00005555558b25e5 in zynqmp_sdhci_realize (dev=0x555557051520, errp=0x7fff7f931150) at hw/sd/zynqmp-sdhci.c:151 #3 0x0000555555a2e7f3 in device_set_realized (obj=0x555557051520, value=<optimized out>, errp=0x7fff7f931270) at hw/core/qdev.c:966 #4 0x0000555555ba3f74 in property_set_bool (obj=0x555557051520, v=<optimized out>, name=<optimized out>, opaque=0x555556e04a20, errp=0x7fff7f931270) at qom/object.c:1906 #5 0x0000555555ba51f4 in object_property_set (obj=obj@entry=0x555557051520, v=v@entry=0x5555576dbd60, name=name@entry=0x555555dd6306 "realized", errp=errp@entry=0x7fff7f931270) at qom/object.c:1102 Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180123132051.24448-1-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: add a 'dma' property to the sysbus devicesPhilippe Mathieu-Daudé2018-01-161-1/+17
| | | | | | | | | | | Add a 'dma' property allowing machine creation to provide the address-space SDHCI DMA operates on. [based on a patch from Alistair Francis <alistair.francis@xilinx.com> from qemu/xilinx tag xilinx-v2016.1] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180115182436.2066-15-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: fix the PCI device, using the PCI address space for DMAPhilippe Mathieu-Daudé2018-01-161-14/+15
| | | | | | | | | | | While SysBus devices can use the get_system_memory() address space, PCI devices should use the bus master address space for DMA. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20180115182436.2066-14-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: Implement write method of ACMD12ERRSTS registerAndrey Smirnov2018-01-161-0/+3
| | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180115182436.2066-13-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-onlyPhilippe Mathieu-Daudé2018-01-161-4/+19
| | | | | | | | | | | | | | | running qtests: $ make check-qtest-arm GTESTER check-qtest-arm SDHC rd_4b @0x44 not implemented SDHC wr_4b @0x40 <- 0x89abcdef not implemented SDHC wr_4b @0x44 <- 0x01234567 not implemented Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180115182436.2066-12-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: rename the SDHC_CAPAB registerPhilippe Mathieu-Daudé2018-01-161-1/+1
| | | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180115182436.2066-11-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h"Philippe Mathieu-Daudé2018-01-161-2/+1Star
| | | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180115182436.2066-10-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: convert the DPRINT() calls into trace eventsPhilippe Mathieu-Daudé2018-01-161-59/+30Star
| | | | | | | | | | | | | | zero-initialize ADMADescr 'dscr' in sdhci_do_adma() to avoid: hw/sd/sdhci.c: In function ‘sdhci_do_adma’: hw/sd/sdhci.c:714:29: error: ‘dscr.addr’ may be used uninitialized in this function [-Werror=maybe-uninitialized] trace_sdhci_adma("link", s->admasysaddr); ^ Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180115182436.2066-9-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: use qemu_log_mask(UNIMP) instead of fprintf()Philippe Mathieu-Daudé2018-01-161-3/+4
| | | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180115182436.2066-8-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: refactor common sysbus/pci unrealize() into sdhci_common_unrealize()Philippe Mathieu-Daudé2018-01-161-0/+22
| | | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180115182436.2066-7-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: refactor common sysbus/pci realize() into sdhci_common_realize()Philippe Mathieu-Daudé2018-01-161-9/+21
| | | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180115182436.2066-6-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: refactor common sysbus/pci class_init() into sdhci_common_class_init()Philippe Mathieu-Daudé2018-01-161-5/+13
| | | | | | | | | Now both inherited classes appear as DEVICE_CATEGORY_STORAGE. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180115182436.2066-5-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: use DEFINE_SDHCI_COMMON_PROPERTIES() for common sysbus/pci propertiesPhilippe Mathieu-Daudé2018-01-161-8/+17
| | | | | | | | | Add common/sysbus/pci/sdbus comments to have clearer code blocks separation. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180115182436.2066-4-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: remove dead codePhilippe Mathieu-Daudé2018-01-161-2/+0Star
| | | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180115182436.2066-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sdhci: clean up includesPhilippe Mathieu-Daudé2018-01-161-0/+1
| | | | | | | Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 20180115182436.2066-2-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* pci: Add INTERFACE_CONVENTIONAL_PCI_DEVICE to Conventional PCI devicesEduardo Habkost2017-10-151-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add INTERFACE_CONVENTIONAL_PCI_DEVICE to all direct subtypes of TYPE_PCI_DEVICE, except: 1) The ones that already have INTERFACE_PCIE_DEVICE set: * base-xhci * e1000e * nvme * pvscsi * vfio-pci * virtio-pci * vmxnet3 2) base-pci-bridge Not all PCI bridges are Conventional PCI devices, so INTERFACE_CONVENTIONAL_PCI_DEVICE is added only to the subtypes that are actually Conventional PCI: * dec-21154-p2p-bridge * i82801b11-bridge * pbm-bridge * pci-bridge The direct subtypes of base-pci-bridge not touched by this patch are: * xilinx-pcie-root: Already marked as PCIe-only. * pcie-pci-bridge: Already marked as PCIe-only. * pcie-port: all non-abstract subtypes of pcie-port are already marked as PCIe-only devices. 3) megasas-base Not all megasas devices are Conventional PCI devices, so the interface names are added to the subclasses registered by megasas_register_types(), according to information in the megasas_devices[] array. "megasas-gen2" already implements INTERFACE_PCIE_DEVICE, so add INTERFACE_CONVENTIONAL_PCI_DEVICE only to "megasas". Acked-by: Alberto Garcia <berto@igalia.com> Acked-by: John Snow <jsnow@redhat.com> Acked-by: Anthony PERARD <anthony.perard@citrix.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Acked-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* sd: sdhci: Remove block count enable check in single block transfersPrasad J Pandit2017-02-281-5/+1Star
| | | | | | | | | | | In SDHCI protocol, the 'Block count enable' bit of the Transfer Mode register is relevant only in multi block transfers. We need not check it in single block transfers. Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Message-id: 20170214185225.7994-5-ppandit@redhat.com Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* sd: sdhci: conditionally invoke multi block transferPrasad J Pandit2017-02-281-1/+5
| | | | | | | | | | In sdhci_write invoke multi block transfer if it is enabled in the transfer mode register 's->trnmod'. Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org> Message-id: 20170214185225.7994-4-ppandit@redhat.com Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2026-02-27 12:53:05 +0100