summaryrefslogtreecommitdiffstats
path: root/include/hw/arm/xlnx-zynqmp.h
Commit message (Expand)AuthorAgeFilesLines
* hw/arm/xlnx-zynqmp: Connect 4 TTC timersEdgar E. Iglesias2022-04-211-0/+4
* hw/arm/xlnx-zynqmp: Connect the ZynqMP APU ControlEdgar E. Iglesias2022-03-181-1/+3
* hw/arm/xlnx-zynqmp: Connect the ZynqMP CRFEdgar E. Iglesias2022-03-181-0/+2
* hw/arm/xlnx-zynqmp: Add an unimplemented SERDES areaEdgar E. Iglesias2022-03-181-1/+1
* hw/arm/xlnx-zynqmp: 'Or' the QSPI / QSPI DMA IRQsFrancisco Iglesias2022-02-081-0/+2
* hw/arm: xlnx-zcu102: Add Xilinx eFUSE deviceTong Ho2021-09-301-0/+3
* hw/arm: xlnx-zcu102: Add Xilinx BBRAM deviceTong Ho2021-09-301-0/+2
* hw/arm/xlnx-zynqmp: Add unimplemented APU mmioTong Ho2021-08-261-0/+7
* hw: Replace anti-social QOM type namesMarkus Armbruster2021-03-191-1/+1
* hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPIXuzhou Cheng2021-03-101-0/+2
* hw/arm: xlnx-zynqmp: Clean up coding convention issuesXuzhou Cheng2021-03-101-1/+2
* hw/arm/xlnx-zynqmp: Remove obsolete 'has_rpu' propertyPhilippe Mathieu-Daudé2021-03-051-2/+0Star
* xlnx-zynqmp: Connect Xilinx ZynqMP CAN controllersVikram Garhwal2020-12-101-0/+8
* Use OBJECT_DECLARE_SIMPLE_TYPE when possibleEduardo Habkost2020-09-181-3/+1Star
* Use DECLARE_*CHECKER* macrosEduardo Habkost2020-09-091-2/+2
* Move QOM typedefs and add missing includesEduardo Habkost2020-09-091-2/+4
* hw: Move Xilinx ZynqMP RTC from hw/timer/ to hw/rtc/ subdirectoryPhilippe Mathieu-Daudé2019-10-241-1/+1
* ide: Include hw/ide/internal a bit less outside hw/ide/Markus Armbruster2019-08-161-1/+0Star
* include: Make headers more self-containedMarkus Armbruster2019-08-161-0/+1
* Normalize position of header guardMarkus Armbruster2019-06-121-1/+1
* Include qemu-common.h exactly where neededMarkus Armbruster2019-06-121-1/+0Star
* arm: Rename hw/arm/arm.h to hw/arm/boot.hPeter Maydell2019-05-231-1/+1
* arm/xlnx-zynqmp: put APUs and RPUs in separate CPU clustersLuc Michel2019-01-071-0/+3
* xlnx-zynqmp: Improve GIC wiring and MMIO mappingLuc Michel2018-08-141-2/+2
* xlnx-zynqmp: Connect the ZynqMP GDMA and ADMAFrancisco Iglesias2018-05-181-0/+5
* xlnx-zynqmp: Connect the RTC deviceAlistair Francis2018-03-021-0/+2
* xlnx-zynqmp: Connect the IPI device to the ZynqMP SoCAlistair Francis2018-01-261-0/+2
* xlnx-zcu102: Add support for the ZynqMP QSPIFrancisco Iglesias2017-12-131-0/+5
* xlnx-zcu102: Add a machine level virtualization propertyAlistair Francis2017-09-141-0/+2
* arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdmaKONRAD Frederic2016-06-141-0/+4
* xlnx-zynqmp: Make the RPU subsystem optionalEdgar E. Iglesias2016-06-061-0/+2
* xlnx-zynqmp: Add a secure prop to en/disable ARM Security ExtensionsEdgar E. Iglesias2016-06-061-0/+3
* xlnx-zynqmp: Connect the SPI devicesAlistair Francis2016-01-211-0/+3
* xlnx-zynqmp: Add support for high DDR memory regionsAlistair Francis2016-01-151-0/+12
* target-arm: xlnx-zynqmp: Add sdhci support.Sai Pavan Boddu2015-10-291-0/+3
* arm: xlnx-zynqmp: Fix up GIC region sizeNathan Rossi2015-09-141-1/+1
* xlnx-zynqmp: Connect the sysbus AHCI to ZynqMPAlistair Francis2015-09-081-0/+3
* xlnx-zynqmp: Connect the four OCM banksAlistair Francis2015-08-251-0/+6
* arm: xlnx-zynqmp: Add 2xCortexR5 CPUsPeter Crosthwaite2015-06-191-0/+2
* arm: xlnx-zynqmp: Add boot-cpu propertyPeter Crosthwaite2015-06-191-0/+3
* arm: xlnx-zynqmp: Preface CPU variables with "apu"Peter Crosthwaite2015-06-191-2/+2
* arm: xlnx-zynqmp: Add UART supportPeter Crosthwaite2015-05-181-0/+3
* arm: xlnx-zynqmp: Add GEM supportPeter Crosthwaite2015-05-181-0/+3
* arm: xlnx-zynqmp: Add GICPeter Crosthwaite2015-05-181-0/+14
* arm: Introduce Xilinx ZynqMP SoCPeter Crosthwaite2015-05-181-0/+38
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-12 07:39:57 +0100