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path: root/include/hw/ppc/pnv.h
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* ppc/pnv: Introduce a LPC FW memory region attribute to map the PNORCédric Le Goater2021-02-101-0/+1
* non-virt: Fix Lesser GPL version numberChetan Pant2020-11-151-1/+1
* qom: Remove module_obj_name parameter from OBJECT_DECLARE* macrosEduardo Habkost2020-09-181-1/+1
* Use OBJECT_DECLARE_TYPE where possibleEduardo Habkost2020-09-091-4/+2Star
* Use DECLARE_*CHECKER* macrosEduardo Habkost2020-09-091-24/+20Star
* Move QOM typedefs and add missing includesEduardo Habkost2020-09-091-13/+20
* ppc/pnv: Create BMC devices only when defaults are enabledCédric Le Goater2020-04-071-0/+2
* ppc/pnv: Add models for POWER8 PHB3 PCIe Host bridgeCédric Le Goater2020-02-021-0/+4
* ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridgeBenjamin Herrenschmidt2020-02-021-0/+7
* ppc/pnv: Add support for "hostboot" modeCédric Le Goater2020-02-021-0/+2
* pnv/xive: Deduce the PnvXive pointer from XiveTCTX::xptrGreg Kurz2020-01-081-2/+0Star
* ppc/pnv: Add a "pnor" const link property to the BMC internal simulatorGreg Kurz2020-01-081-1/+1
* ppc/pnv: Add an "nr-threads" property to the base chip classGreg Kurz2020-01-081-0/+1
* ppc/pnv: Introduce a "xics" property under the POWER8 chipCédric Le Goater2020-01-081-0/+2
* ppc/pnv: Drop PnvChipClass::typeGreg Kurz2019-12-171-9/+0Star
* ppc/pnv: Introduce PnvChipClass::xscom_pcba() methodGreg Kurz2019-12-171-0/+1
* ppc/pnv: Drop pnv_chip_is_power9() and pnv_chip_is_power10() helpersGreg Kurz2019-12-171-10/+0Star
* ppc/pnv: Introduce PnvChipClass::xscom_core_base() methodGreg Kurz2019-12-171-0/+1
* ppc/pnv: Introduce PnvChipClass::intc_print_info() methodGreg Kurz2019-12-171-0/+1
* ppc/pnv: Drop pnv_is_power9() and pnv_is_power10() helpersGreg Kurz2019-12-171-10/+0Star
* ppc/pnv: Introduce PnvMachineClass::dt_power_mgt()Greg Kurz2019-12-171-2/+6
* ppc/pnv: Introduce PnvMachineClass and PnvMachineClass::compatGreg Kurz2019-12-171-0/+13
* ppc/pnv: Fix OCC common area region mappingCédric Le Goater2019-12-171-0/+4
* ppc/pnv: Introduce PBA registersCédric Le Goater2019-12-171-10/+6Star
* ppc/pnv: add a LPC Controller model for POWER10Cédric Le Goater2019-12-171-0/+4
* ppc/pnv: add a PSI bridge model for POWER10Cédric Le Goater2019-12-171-0/+9
* ppc/pnv: Introduce a POWER10 PnvChip and a powernv10 machineCédric Le Goater2019-12-171-0/+33
* ppc/pnv: Clarify how the TIMA is accessed on a multichip systemCédric Le Goater2019-12-171-0/+3
* ppc/pnv: Fix TIMA indirect accessCédric Le Goater2019-12-171-0/+2
* ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helperCédric Le Goater2019-12-171-0/+5
* ppc/pnv: Instantiate cores separatelyGreg Kurz2019-12-171-1/+1
* ppc/pnv: Create BMC devices at machine initCédric Le Goater2019-12-171-1/+1
* ppc/pnv: Add HIOMAP commandsCédric Le Goater2019-12-171-0/+1
* ppc/pnv: Add a PNOR modelCédric Le Goater2019-12-171-0/+3
* ppc: Add intc_destroy() handlers to SpaprInterruptController/PnvChipGreg Kurz2019-11-181-0/+1
* ppc: Reset the interrupt presenter from the CPU reset handlerCédric Le Goater2019-10-241-0/+1
* hw/ppc/pnv_homer: add PowerNV homer device modelBalamuruhan S2019-10-041-0/+3
* hw/ppc/pnv_xscom: retrieve homer/occ base address from PBA BARsBalamuruhan S2019-10-041-0/+18
* ppc/pnv: remove xscom_base field from PnvChipCédric Le Goater2019-07-021-4/+1Star
* ppc/pnv: fix XSCOM MMIO base address for P9 machines with multiple chipsCédric Le Goater2019-07-021-0/+3
* Clean up ill-advised or unusual header guardsMarkus Armbruster2019-05-131-3/+4
* ppc/pnv: POWER9 XSCOM quad supportCédric Le Goater2019-03-121-0/+4
* ppc/pnv: add a OCC model for POWER9Cédric Le Goater2019-03-121-0/+1
* ppc/pnv: add a LPC Controller model for POWER9Cédric Le Goater2019-03-121-0/+4
* ppc/pnv: add a 'dt_isa_nodename' to the chipCédric Le Goater2019-03-121-0/+2
* ppc/pnv: add a PSI bridge model for POWER9Cédric Le Goater2019-03-121-0/+6
* ppc/pnv: add a PSI bridge class modelCédric Le Goater2019-03-121-1/+1
* ppc/pnv: introduce a new pic_print_info() operation to the chip modelCédric Le Goater2019-03-121-0/+1
* ppc/pnv: introduce a new dt_populate() operation to the chip modelCédric Le Goater2019-03-121-0/+1
* ppc/pnv: add a XIVE interrupt controller model for POWER9Cédric Le Goater2019-03-121-0/+21
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