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path: root/include/hw/riscv/virt.h
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* hw/riscv: migrate fdt field to generic MachineStateAlex Bennée2021-03-101-1/+0Star
* riscv: virt: Remove target macro conditionalsAlistair Francis2020-12-181-6/+0Star
* Use DECLARE_*CHECKER* macrosEduardo Habkost2020-09-091-2/+2
* Move QOM typedefs and add missing includesEduardo Habkost2020-09-091-2/+4
* hw/riscv: virt: Allow creating multiple NUMA socketsAnup Patel2020-08-251-2/+7
* riscv: virt: Use Goldfish RTC deviceAnup Patel2020-02-101-0/+2
* riscv/virt: Add the PFlash CFI01 deviceAlistair Francis2019-10-281-0/+3
* riscv/virt: Manually define the machineAlistair Francis2019-10-281-1/+6
* riscv: hw: Drop "clock-frequency" property of cpu nodesBin Meng2019-10-281-4/+0Star
* include: Make headers more self-containedMarkus Armbruster2019-08-161-0/+3
* target/riscv: Add a base 32 and 64 bit CPUAlistair Francis2019-05-241-2/+2
* riscv: plic: Fix incorrect irq calculationAlistair Francis2019-04-051-1/+1
* hw/riscv/virt: Connect the gpex PCIeAlistair Francis2018-12-201-1/+12
* hw/riscv/virt: Increase the number of interruptsAlistair Francis2018-12-201-1/+1
* RISC-V: Make virt header comment title consistentMichael Clark2018-05-061-1/+1
* RISC-V: Make some header guards more specificMichael Clark2018-05-061-2/+2
* RISC-V: Remove unused class definitionsMichael Clark2018-05-061-5/+0Star
* RISC-V: Use ROM base address and size from memmapMichael Clark2018-05-061-2/+0Star
* RISC-V: Replace hardcoded constants with enum valuesMichael Clark2018-05-061-0/+4
* RISC-V VirtIO MachineMichael Clark2018-03-061-0/+74