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| * | spapr: Simplify handling of pre ISA 3.0 guest workaround handlingDavid Gibson2019-10-041-1/+1
| * | spapr/irq: Introduce an ics_irq_free() helperCédric Le Goater2019-10-041-0/+5
| * | hw/ppc/pnv_homer: add PowerNV homer device modelBalamuruhan S2019-10-042-0/+56
| * | hw/ppc/pnv_occ: add sram device model for occ common areaBalamuruhan S2019-10-041-0/+3
| * | hw/ppc/pnv_xscom: retrieve homer/occ base address from PBA BARsBalamuruhan S2019-10-041-0/+18
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* / vfio: Turn the container error into an Error handleEric Auger2019-10-041-1/+1
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* cputlb: Remove cpu->mem_io_vaddrRichard Henderson2019-09-251-2/+0Star
* xen: perform XenDevice clean-up in XenBus watch handlerPaul Durrant2019-09-241-0/+3
* xen: introduce separate XenWatchList for XenDevice objectsPaul Durrant2019-09-241-0/+2
* xen / notify: introduce a new XenWatchList abstractionPaul Durrant2019-09-241-1/+2
* pc: Add an SMB0 ACPI device to q35Corey Minyard2019-09-201-0/+2
* ipmi: Fix SSIF ACPI handling to use the right CRSCorey Minyard2019-09-201-1/+1
* acpi: Add i2c serial bus CRS handlingCorey Minyard2019-09-201-0/+18
* ipmi: Add PCI IPMI interfacesCorey Minyard2019-09-201-0/+1
* ipmi: Allow a size value to be passed for I/O spaceCorey Minyard2019-09-203-1/+8
* ipmi: Split out BT-specific code from ISA BT codeCorey Minyard2019-09-201-0/+72
* ipmi: Split out KCS-specific code from ISA KCS codeCorey Minyard2019-09-201-0/+75
* qdev: Add a no default uuid propertyCorey Minyard2019-09-201-0/+7
* Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-4.2-sf1-v3...Peter Maydell2019-09-1911-92/+298
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| * riscv: sifive_u: Remove handcrafted clock nodes for UART and ethernetBin Meng2019-09-171-2/+1Star
| * riscv: sifive_u: Fix broken GEM supportBin Meng2019-09-171-1/+2
| * riscv: sifive_u: Instantiate OTP memory with a serial numberBin Meng2019-09-171-0/+3
| * riscv: sifive: Implement a model for SiFive FU540 OTPBin Meng2019-09-171-0/+80
| * riscv: sifive_u: Update UART base addresses and IRQsBin Meng2019-09-171-2/+2
| * riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodesBin Meng2019-09-171-0/+10
| * riscv: sifive_u: Add PRCI block to the SoCBin Meng2019-09-171-0/+3
| * riscv: sifive_u: Generate hfclk and rtcclk nodesBin Meng2019-09-171-0/+2
| * riscv: sifive: Implement PRCI model for FU540Bin Meng2019-09-171-0/+81
| * riscv: sifive_u: Update hart configuration to reflect the real FU540 SoCBin Meng2019-09-171-1/+5
| * riscv: sifive_u: Set the minimum number of cpus to 2Bin Meng2019-09-171-0/+2
| * riscv: hart: Add a "hartid-base" property to RISC-V hart arrayBin Meng2019-09-171-0/+1
| * riscv: Add a sifive_cpu.h to include both E and U cpu type definesBin Meng2019-09-173-12/+33
| * riscv: sifive_e: prci: Update the PRCI register block sizeBin Meng2019-09-171-0/+2
| * riscv: sifive: Rename sifive_prci.{c, h} to sifive_e_prci.{c, h}Bin Meng2019-09-172-71/+69Star
| * riscv: sifive_test: Add reset functionalityBin Meng2019-09-171-1/+2
| * riscv: Add a helper routine for finding firmwareBin Meng2019-09-171-0/+1
| * riscv: plic: Remove unused interrupt functionsAlistair Francis2019-09-171-3/+0Star
* | Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell2019-09-172-0/+10
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| * qdev/machine: Introduce hotplug_allowed hookPeter Xu2019-09-162-0/+10
* | Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2019-09-173-11/+6Star
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| * | hw/i386/pc: Extract e820 memory layout codePhilippe Mathieu-Daudé2019-09-161-11/+0Star
| * | elf-ops.h: fix int overflow in load_elf()Stefano Garzarella2019-09-162-0/+6
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* | aspeed/scu: Introduce a aspeed_scu_get_apb_freq() routineCédric Le Goater2019-09-131-5/+3Star
* | aspeed/scu: Introduce per-SoC SCU typesCédric Le Goater2019-09-131-0/+15
* | aspeed/smc: Inject errors in DMA checksumCédric Le Goater2019-09-131-0/+1
* | aspeed/smc: Add support for DMAsCédric Le Goater2019-09-131-0/+6
* | aspeed: Use consistent typenamesCédric Le Goater2019-09-131-3/+0Star
* | aspeed: add a GPIO controller to the SoCRashmica Gupta2019-09-131-0/+3
* | hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500Rashmica Gupta2019-09-131-0/+100
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* escc: introduce a selector for the register bitLaurent Vivier2019-09-071-0/+1
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