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| * | memory: Provide an equality function for MemoryRegionSectionsDr. David Alan Gilbert2019-09-251-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a comparison function that checks all the fields are the same. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190814175535.2023-3-dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | memory: Align MemoryRegionSections fieldsDr. David Alan Gilbert2019-09-251-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | MemoryRegionSection includes an Int128 'size' field; on some platforms the compiler causes an alignment of this to a 128bit boundary, leaving 8 bytes of dead space. This deadspace can be filled with junk. Move the size field to the top avoiding unnecessary alignment. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190814175535.2023-2-dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | Merge remote-tracking branch ↵Peter Maydell2019-09-261-6/+0Star
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/dgilbert/tags/pull-migration-20190925a' into staging Migration pull 2019-09-25 me: test fixes from (should stop hangs in postcopy tests). me: An RDMA cleanup hang fix Wei: Tidy ups around postcopy Marc-Andre: mem leak fix # gpg: Signature made Wed 25 Sep 2019 15:59:41 BST # gpg: using RSA key 45F5C71B4A0CB7FB977A9FA90516331EBC5BFDE7 # gpg: Good signature from "Dr. David Alan Gilbert (RH2) <dgilbert@redhat.com>" [full] # Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7 * remotes/dgilbert/tags/pull-migration-20190925a: migration/postcopy: Recognise the recovery states as 'in_postcopy' tests/migration/postcopy: trim migration bandwidth tests/migration: Fail on unexpected migration states migration/rdma.c: Swap synchronize_rcu for call_rcu migration/rdma: Don't moan about disconnects at the end migration: remove sent parameter in get_queued_page_not_dirty migration/postcopy: unsentmap is not necessary for postcopy migration/postcopy: not necessary to do discard when canonicalizing bitmap migration: fix vmdesc leak on vmstate_save() error Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | migration/postcopy: unsentmap is not necessary for postcopyWei Yang2019-09-251-6/+0Star
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f3f491fcd6dd594ba695 ('Postcopy: Maintain unsentmap') introduced unsentmap to track not yet sent pages. This is not necessary since: * unsentmap is a sub-set of bmap before postcopy start * unsentmap is the summation of bmap and unsentmap after canonicalizing This patch just removes it. Signed-off-by: Wei Yang <richardw.yang@linux.intel.com> Message-Id: <20190819061843.28642-3-richardw.yang@linux.intel.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
* | Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2019-09-24-v2' ↵Peter Maydell2019-09-261-0/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging nbd patches for 2019-09-24 - Improved error message for plaintext client of encrypted server - Fix various assertions when -object iothread is in use - Silence a Coverity error for use-after-free on error path # gpg: Signature made Wed 25 Sep 2019 14:35:52 BST # gpg: using RSA key 71C2CC22B1C4602927D2F3AAA7A16B4A2527436A # gpg: Good signature from "Eric Blake <eblake@redhat.com>" [full] # gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" [full] # gpg: aka "[jpeg image of size 6874]" [full] # Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 436A * remotes/ericb/tags/pull-nbd-2019-09-24-v2: util/qemu-sockets: fix keep_alive handling in inet_connect_saddr tests: Use iothreads during iotest 223 nbd: Grab aio context lock in more places nbd/server: attach client channel to the export's AioContext nbd/client: Add hint when TLS is missing Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | nbd: Grab aio context lock in more placesEric Blake2019-09-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When iothreads are in use, the failure to grab the aio context results in an assertion failure when trying to unlock things during blk_unref, when trying to unlock a mutex that was not locked. In short, all calls to nbd_export_put need to done while within the correct aio context. But since nbd_export_put can recursively reach itself via nbd_export_close, and recursively grabbing the context would deadlock, we can't do the context grab directly in those functions, but must do so in their callers. Hoist the use of the correct aio_context from nbd_export_new() to its caller qmp_nbd_server_add(). Then tweak qmp_nbd_server_remove(), nbd_eject_notifier(), and nbd_esport_close_all() to grab the right context, so that all callers during qemu now own the context before nbd_export_put() can call blk_unref(). Remaining uses in qemu-nbd don't matter (since that use case does not support iothreads). Suggested-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <20190917023917.32226-1-eblake@redhat.com> Reviewed-by: Sergio Lopez <slp@redhat.com>
* | | Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2019-09-24' into ↵Peter Maydell2019-09-251-4/+4
|\ \ \ | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging QAPI patches for 2019-09-24 # gpg: Signature made Tue 24 Sep 2019 13:10:36 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2019-09-24: (37 commits) qapi: Assert .visit() and .check_clash() run only after .check() qapi: Fix excessive QAPISchemaEntity.check() recursion qapi: Fix to .check() empty structs just once qapi: Delete useless check_exprs() code for simple union kind qapi: Clean up around check_known_keys() qapi: Simplify check_keys() qapi: Normalize 'if' in check_exprs(), like other sugar qapi: Fix missing 'if' checks in struct, union, alternate 'data' qapi: Reject blank 'if' conditions in addition to empty ones qapi: Fix broken discriminator error messages qapi: Remove null from schema language qapi: Improve reporting of lexical errors qapi: Use quotes more consistently in frontend error messages tests/qapi-schema: Demonstrate suboptimal lexical errors tests/qapi-schema: Demonstrate insufficient 'if' checking tests/qapi-schema: Demonstrate broken discriminator errors tests/qapi-schema: Demonstrate misleading optional tag error tests/qapi-schema: Delete two redundant tests tests/qapi-schema: Cover unknown pragma qapi: Tweak code to match docs/devel/qapi-code-gen.txt ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | qapi: Make visit_next_list()'s comment less confusingMarkus Armbruster2019-09-241-4/+4
| |/ | | | | | | | | | | | | | | | | | | visit_next_list() returns non-null on success, null on failure. The comment's phrasing "until NULL return or error occurs" is needlessly confusing. Scratch the "or error occurs" part. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190802122325.16520-1-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
* | xen: perform XenDevice clean-up in XenBus watch handlerPaul Durrant2019-09-241-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cleaning up offline XenDevice objects directly in xen_device_backend_changed() is dangerous as xen_device_unrealize() will modify the watch list that is being walked. Even the QLIST_FOREACH_SAFE() used in notifier_list_notify() is insufficient as *two* notifiers (for the frontend and backend watches) are removed, thus potentially rendering the 'next' pointer unsafe. The solution is to use the XenBus backend_watch handler to do the clean-up instead, as it is invoked whilst walking a separate watch list. This patch therefore adds a new 'inactive_devices' list to XenBus, to which offline devices are added by xen_device_backend_changed(). The XenBus backend_watch registration is also changed to not only invoke xen_bus_enumerate() but also a new xen_bus_cleanup() function, which will walk 'inactive_devices' and perform the necessary actions. For safety an extra 'online' check is also added to xen_bus_type_enumerate() to make sure that no attempt is made to create a new XenDevice object for a backend that is offline. NOTE: This patch also includes some cosmetic changes: - substitute the local variable name 'backend_state' in xen_bus_type_enumerate() with 'state', since there is no ambiguity with any other state in that context. - change xen_device_state_is_active() to xen_device_frontend_is_active() (and pass a XenDevice directly) since the state tests contained therein only apply to a frontend. - use 'state' rather then 'xendev->backend_state' in xen_device_backend_changed() to shorten the code. Signed-off-by: Paul Durrant <paul.durrant@citrix.com> Reviewed-by: Anthony PERARD <anthony.perard@citrix.com> Message-Id: <20190913082159.31338-4-paul.durrant@citrix.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
* | xen: introduce separate XenWatchList for XenDevice objectsPaul Durrant2019-09-241-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | This patch uses the XenWatchList abstraction to add a separate watch list for each device. This is more scalable than walking a single notifier list for all watches and is also necessary to implement a bug-fix in a subsequent patch. Signed-off-by: Paul Durrant <paul.durrant@citrix.com> Reviewed-by: Anthony Perard <anthony.perard@citrix.com> Message-Id: <20190913082159.31338-3-paul.durrant@citrix.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
* | xen / notify: introduce a new XenWatchList abstractionPaul Durrant2019-09-242-1/+4
|/ | | | | | | | | | | | | | | | | | | | Xenstore watch call-backs are already abstracted away from XenBus using the XenWatch data structure but the associated NotifierList manipulation and file handle registration is still open coded in various xen_bus_...() functions. This patch creates a new XenWatchList data structure to allow these interactions to be abstracted away from XenBus as well. This is in preparation for a subsequent patch which will introduce separate watch lists for XenBus and XenDevice objects. NOTE: This patch also introduces a new notifier_list_empty() helper function for the purposes of adding an assertion that a XenWatchList is not freed whilst its associated NotifierList is still occupied. Signed-off-by: Paul Durrant <paul.durrant@citrix.com> Reviewed-by: Anthony Perard <anthony.perard@citrix.com> Message-Id: <20190913082159.31338-2-paul.durrant@citrix.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com>
* Merge remote-tracking branch ↵Peter Maydell2019-09-238-2/+184
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/cminyard/tags/ipmi-for-release-2019-09-20' into staging ipmi: Some bug fixes and new interfaces Some bug fixes for the watchdog and hopeful the BT tests. Change the IPMI UUID handling to give the user the ability to set it or not have it. Add a PCI interface. Add an SMBus interfaces. -corey # gpg: Signature made Fri 20 Sep 2019 20:11:21 BST # gpg: using RSA key FD0D5CE67CE0F59A6688268661F38C90919BFF81 # gpg: Good signature from "Corey Minyard <cminyard@mvista.com>" [unknown] # gpg: aka "Corey Minyard <minyard@acm.org>" [unknown] # gpg: aka "Corey Minyard <corey@minyard.net>" [unknown] # gpg: aka "Corey Minyard <minyard@mvista.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FD0D 5CE6 7CE0 F59A 6688 2686 61F3 8C90 919B FF81 * remotes/cminyard/tags/ipmi-for-release-2019-09-20: pc: Add an SMB0 ACPI device to q35 ipmi: Fix SSIF ACPI handling to use the right CRS acpi: Add i2c serial bus CRS handling ipmi: Add an SMBus IPMI interface ipmi: Add PCI IPMI interfaces smbios:ipmi: Ignore IPMI devices with no fwinfo function ipmi: Allow a size value to be passed for I/O space ipmi: Split out BT-specific code from ISA BT code ipmi: Split out KCS-specific code from ISA KCS code ipmi: Add a UUID device property qdev: Add a no default uuid property tests:ipmi: Fix IPMI BT tests ipmi: Generate an interrupt on watchdog pretimeout expiry ipmi: Fix the get watchdog command ipmi: Fix watchdog NMI handling Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * pc: Add an SMB0 ACPI device to q35Corey Minyard2019-09-201-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is so I2C devices can be found in the ACPI namespace. Currently that's only IPMI, but devices can be easily added now. Adding the devices required some PCI information, and the bus itself to be added to the PCMachineState structure. Note that this only works on Q35, the ACPI for PIIX4 is not capable of handling an SMBus device. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
| * ipmi: Fix SSIF ACPI handling to use the right CRSCorey Minyard2019-09-201-1/+1
| | | | | | | | | | | | | | | | Pass in the CRS so that it can be set to the SMBus for IPMI later. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * acpi: Add i2c serial bus CRS handlingCorey Minyard2019-09-201-0/+18
| | | | | | | | | | | | | | | | | | This will be required for getting IPMI SSIF (SMBus interface) into the ACPI tables. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * ipmi: Add PCI IPMI interfacesCorey Minyard2019-09-201-0/+1
| | | | | | | | | | | | | | | | | | Pretty straightforward, just hook the current KCS and BT code into the PCI system with the proper configuration. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: M: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * ipmi: Allow a size value to be passed for I/O spaceCorey Minyard2019-09-203-1/+8
| | | | | | | | | | | | | | | | PCI device I/O must be >= 8 bytes in length or they don't work. Allow the size to be passed in, the default size of 2 or 3 won't work. Signed-off-by: Corey Minyard <cminyard@mvista.com>
| * ipmi: Split out BT-specific code from ISA BT codeCorey Minyard2019-09-201-0/+72
| | | | | | | | | | | | | | | | | | | | Get ready for PCI and other BT interfaces. No functional changes, just split the code into generic BT code and ISA-specific BT code. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
| * ipmi: Split out KCS-specific code from ISA KCS codeCorey Minyard2019-09-201-0/+75
| | | | | | | | | | | | | | | | | | | | Get ready for PCI and other KCS interfaces. No functional changes, just split the code into the generic KCS code and the ISA-specific code. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
| * qdev: Add a no default uuid propertyCorey Minyard2019-09-201-0/+7
| | | | | | | | | | | | | | | | | | | | | | This is for IPMI, which will behave differently if the UUID is not set. Signed-off-by: Corey Minyard <cminyard@mvista.com> Cc: Fam Zheng <famz@redhat.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
* | Merge remote-tracking branch ↵Peter Maydell2019-09-203-2/+3
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/vivier2/tags/trivial-branch-pull-request' into staging Trivial patches 20190919 # gpg: Signature made Thu 19 Sep 2019 14:50:55 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-pull-request: configure: Add xkbcommon configure options kvm: Fix typo in header of kvm_device_access() Fix cacheline detection on FreeBSD/powerpc. build: Don't ignore qapi-visit-core.c target/m68k/fpu_helper.c: rename the access arguments Replace '-machine accel=xyz' with '-accel xyz' cutils: Move size_to_str() from "qemu-common.h" to "qemu/cutils.h" vfio: fix a typo Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * kvm: Fix typo in header of kvm_device_access()Greg Kurz2019-09-191-1/+1
| | | | | | | | | | | | Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <156829664683.2070256.13400788010568373502.stgit@bahia.tls.ibm.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| * cutils: Move size_to_str() from "qemu-common.h" to "qemu/cutils.h"Philippe Mathieu-Daudé2019-09-192-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | "qemu/cutils.h" contains various qemu_strtosz_*() functions useful to convert strings to size. It seems natural to have the opposite usage (from size to string) there too. The function definition is already in util/cutils.c. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Message-Id: <20190903120555.7551-1-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
* | Merge remote-tracking branch 'remotes/kraxel/tags/ui-20190919-pull-request' ↵Peter Maydell2019-09-191-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging ui: add barrier client. ui: bugfixes for vnc & egl. # gpg: Signature made Thu 19 Sep 2019 08:09:05 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/ui-20190919-pull-request: vnc: fix memory leak when vnc disconnect ui: add an embedded Barrier client vnc: fix websocket field in events ui/egl: fix framebuffer reads Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | ui/egl: fix framebuffer readsGerd Hoffmann2019-09-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix egl_fb_read() to use the (destination) surface size instead of the (source) framebuffer source for glReadPixels. Pass the DisplaySurface instead of the pixeldata pointer to egl_fb_read() to make this possible. With that in place framebuffer reads work fine even if the surface and framebuffer sizes don't match, so we can remove the guest-triggerable asserts in egl_scanout_flush(). Buglink: https://bugzilla.redhat.com//show_bug.cgi?id=1749659 Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20190909073911.24787-1-kraxel@redhat.com
* | | Merge remote-tracking branch ↵Peter Maydell2019-09-1911-92/+298
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/palmer/tags/riscv-for-master-4.2-sf1-v3' into staging RISC-V Patches for the 4.2 Soft Freeze, Part 1, v3 This contains quite a few patches that I'd like to target for 4.2. They're mostly emulation fixes for the sifive_u board, which now much more closely matches the hardware and can therefor run the same fireware as what gets loaded onto the board. Additional user-visible improvements include: * support for loading initrd files from the command line into Linux, via /chosen/linux,initrd-{start,end} device tree nodes. * The conversion of LOG_TRACE to trace events. * The addition of clock DT nodes for our uart and ethernet. This also includes some preliminary work for the H extension patches, but does not include the H extension patches as I haven't had time to review them yet. This passes my OE boot test on 32-bit and 64-bit virt machines, as well as a 64-bit upstream Linux boot on the sifive_u machine. It has been fixed to actually pass "make check" this time. Changes since v2 (never made it to the list): * Sets the sifive_u machine default core count to 2 instead of 5. Changes since v1 <20190910190513.21160-1-palmer@sifive.com>: * Sets the sifive_u machine default core count to 5 instead of 1, as it's impossible to have a single core sifive_u machine. # gpg: Signature made Tue 17 Sep 2019 16:43:30 BST # gpg: using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41 # gpg: issuer "palmer@dabbelt.com" # gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown] # gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41 * remotes/palmer/tags/riscv-for-master-4.2-sf1-v3: (48 commits) gdbstub: riscv: fix the fflags registers target/riscv: Use TB_FLAGS_MSTATUS_FS for floating point target/riscv: Fix mstatus dirty mask target/riscv: Use both register name and ABI name riscv: sifive_u: Update model and compatible strings in device tree riscv: sifive_u: Remove handcrafted clock nodes for UART and ethernet riscv: sifive_u: Fix broken GEM support riscv: sifive_u: Instantiate OTP memory with a serial number riscv: sifive: Implement a model for SiFive FU540 OTP riscv: roms: Update default bios for sifive_u machine riscv: sifive_u: Change UART node name in device tree riscv: sifive_u: Update UART base addresses and IRQs riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodes riscv: sifive_u: Add PRCI block to the SoC riscv: sifive_u: Generate hfclk and rtcclk nodes riscv: sifive: Implement PRCI model for FU540 riscv: sifive_u: Update PLIC hart topology configuration string riscv: sifive_u: Update hart configuration to reflect the real FU540 SoC riscv: sifive_u: Set the minimum number of cpus to 2 riscv: hart: Add a "hartid-base" property to RISC-V hart array ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | riscv: sifive_u: Remove handcrafted clock nodes for UART and ethernetBin Meng2019-09-171-2/+1Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the past we did not have a model for PRCI, hence two handcrafted clock nodes ("/soc/ethclk" and "/soc/uartclk") were created for the purpose of supplying hard-coded clock frequencies. But now since we have added the PRCI support in QEMU, we don't need them any more. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: sifive_u: Fix broken GEM supportBin Meng2019-09-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present the GEM support in sifive_u machine is seriously broken. The GEM block register base was set to a weird number (0x100900FC), which for no way could work with the cadence_gem model in QEMU. Not like other GEM variants, the FU540-specific GEM has a management block to control 10/100/1000Mbps link speed changes, that is mapped to 0x100a0000. We can simply map it into MMIO space without special handling using create_unimplemented_device(). Update the GEM node compatible string to use the official name used by the upstream Linux kernel, and add the management block reg base & size to the <reg> property encoding. Tested with upstream U-Boot and Linux kernel MACB drivers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: sifive_u: Instantiate OTP memory with a serial numberBin Meng2019-09-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds an OTP memory with a given serial number to the sifive_u machine. With such support, the upstream U-Boot for sifive_fu540 boots out of the box on the sifive_u machine. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: sifive: Implement a model for SiFive FU540 OTPBin Meng2019-09-171-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements a simple model for SiFive FU540 OTP (One-Time Programmable) Memory interface, primarily for reading out the stored serial number from the first 1 KiB of the 16 KiB OTP memory reserved by SiFive for internal use. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: sifive_u: Update UART base addresses and IRQsBin Meng2019-09-171-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This updates the UART base address and IRQs to match the hardware. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jonathan Behrens <fintelia@gmail.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Chih-Min Chao <chihmin.chao@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: sifive_u: Reference PRCI clocks in UART and ethernet nodesBin Meng2019-09-171-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that we have added a PRCI node, update existing UART and ethernet nodes to reference PRCI as their clock sources, to keep in sync with the Linux kernel device tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: sifive_u: Add PRCI block to the SoCBin Meng2019-09-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PRCI mmio base address and size mappings to sifive_u machine, and generate the corresponding device tree node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: sifive_u: Generate hfclk and rtcclk nodesBin Meng2019-09-171-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To keep in sync with Linux kernel device tree, generate hfclk and rtcclk nodes in the device tree, to be referenced by PRCI node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: sifive: Implement PRCI model for FU540Bin Meng2019-09-171-0/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a simple PRCI model for FU540 (sifive_u). It has different register layout from the existing PRCI model for FE310 (sifive_e). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: sifive_u: Update hart configuration to reflect the real FU540 SoCBin Meng2019-09-171-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The FU540-C000 includes a 64-bit E51 RISC-V core and four 64-bit U54 RISC-V cores. Currently the sifive_u machine only populates 4 U54 cores. Update the max cpu number to 5 to reflect the real hardware, by creating 2 CPU clusters as containers for RISC-V hart arrays to populate heterogeneous harts. The cpu nodes in the generated DTS have been updated as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: sifive_u: Set the minimum number of cpus to 2Bin Meng2019-09-171-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is not useful if we only have one management CPU. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> [Palmer: Set default CPUs to 2] Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: hart: Add a "hartid-base" property to RISC-V hart arrayBin Meng2019-09-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present each hart's hartid in a RISC-V hart array is assigned the same value of its index in the hart array. But for a system that has multiple hart arrays, this is not the case any more. Add a new "hartid-base" property so that hartid number can be assigned based on the property value. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: Add a sifive_cpu.h to include both E and U cpu type definesBin Meng2019-09-173-12/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Group SiFive E and U cpu type defines into one header file. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: sifive_e: prci: Update the PRCI register block sizeBin Meng2019-09-171-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently the PRCI register block size is set to 0x8000, but in fact 0x1000 is enough, which is also what the manual says. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Chih-Min Chao <chihmin.chao@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: sifive: Rename sifive_prci.{c, h} to sifive_e_prci.{c, h}Bin Meng2019-09-172-71/+69Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current SiFive PRCI model only works with sifive_e machine, as it only emulates registers or PRCI block in the FE310 SoC. Rename the file name to make it clear that it is for sifive_e. This also prefix "sifive_e"/"SIFIVE_E" for all macros, variables and functions. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Chih-Min Chao <chihmin.chao@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: sifive_test: Add reset functionalityBin Meng2019-09-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a reset opcode for sifive_test device to trigger a system reset for testing purpose. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: Add a helper routine for finding firmwareBin Meng2019-09-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a helper routine for finding firmware. It is currently used only for "-bios default" case. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| * | | riscv: plic: Remove unused interrupt functionsAlistair Francis2019-09-171-3/+0Star
| | |/ | |/| | | | | | | | | | | | | | | | | | | Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Jonathan Behrens <fintelia@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Chih-Min Chao <chihmin.chao@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
* | | Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell2019-09-172-0/+10
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | virtio,vhost,pc: features, fixes, cleanups. Virtio 1.0 support for virtio-mmio. Misc fixes, cleanups. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Mon 16 Sep 2019 16:17:30 BST # gpg: using RSA key 281F0DB8D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: virtio-mmio: implement modern (v2) personality (virtio-1) virtio pmem: user document intel_iommu: Remove the caching-mode check during flag change pc/q35: Disallow vfio-pci hotplug without VT-d caching mode qdev/machine: Introduce hotplug_allowed hook intel_iommu: Sanity check vfio-pci config on machine init done backends/vhost-user.c: prevent using uninitialized vqs vhost-user-blk: prevent using uninitialized vqs docs/nvdimm: add example on persistent backend setup MAINTAINERS: update virtio-rng and virtio-serial maintainer Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | qdev/machine: Introduce hotplug_allowed hookPeter Xu2019-09-162-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce this new per-machine hook to give any machine class a chance to do a sanity check on the to-be-hotplugged device as a sanity test. This will be used for x86 to try to detect some illegal configuration of devices, e.g., possible conflictions between vfio-pci and x86 vIOMMU. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <20190916080718.3299-3-peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | | Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2019-09-176-25/+43
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Fix Patchew CI failures (myself) * i386 fw_cfg refactoring (Philippe) * pmem bugfix (Stefan) * Support for accessing cstate MSRs (Wanpeng) * exec.c cleanups (Wei Yang) * Improved throttling (Yury) * elf-ops.h coverity fix (Stefano) # gpg: Signature made Mon 16 Sep 2019 16:13:12 BST # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (29 commits) hw/i386/pc: Extract the x86 generic fw_cfg code hw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_* hw/i386/pc: Let pc_build_feature_control() take a MachineState argument hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios() hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument hw/i386/pc: Replace PCMachineState argument with MachineState in fw_cfg_arch_create hw/i386/pc: Pass the CPUArchIdList array by argument hw/i386/pc: Pass the apic_id_limit value by argument hw/i386/pc: Pass the boot_cpus value by argument hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create hw/i386/pc: Use address_space_memory in place hw/i386/pc: Extract e820 memory layout code hw/i386/pc: Use e820_get_num_entries() to access e820_entries cpus: Fix throttling during vm_stop qemu-thread: Add qemu_cond_timedwait memory: inline and optimize devend_memop memory: fetch pmem size in get_file_size() elf-ops.h: fix int overflow in load_elf() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | | hw/i386/pc: Extract e820 memory layout codePhilippe Mathieu-Daudé2019-09-161-11/+0Star
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Suggested-by: Samuel Ortiz <sameo@linux.intel.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190818225414.22590-3-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | qemu-thread: Add qemu_cond_timedwaitYury Kotov2019-09-161-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new function is needed to implement conditional sleep for CPU throttling. It's possible to reuse qemu_sem_timedwait, but it's more difficult than just add qemu_cond_timedwait. Also moved compute_abs_deadline function up the code to reuse it in qemu_cond_timedwait_impl win32. Signed-off-by: Yury Kotov <yury-kotov@yandex-team.ru> Message-Id: <20190909131335.16848-2-yury-kotov@yandex-team.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * | | memory: inline and optimize devend_memopPaolo Bonzini2019-09-161-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | devend_memop can rely on the fact that the result is always either 0 or MO_BSWAP, corresponding respectively to host endianness and the opposite. Native (target) endianness in turn can be either the host endianness, in which case MO_BSWAP is only returned for host-opposite endianness, or the opposite, in which case 0 is only returned for host endianness. With this in mind, devend_memop can be compiled as a setcond+shift for every target. Do this and, while at it, move it to include/exec/memory.h since !NEED_CPU_H files do not (and should not) need it. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-02-04 15:03:17 +0100