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* exec: move include files to include/exec/Paolo Bonzini2012-12-191-64/+0Star
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-or32: Add target stubs and QOM cpuJia Liu2012-07-271-0/+1
| | | | | | | Add OpenRISC target stubs, QOM cpu and basic machine. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Rename CPUState -> CPUArchStateAndreas Färber2012-03-141-1/+1
| | | | | | | | | | | | | Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
* Avoid CPU endian memory accesses in devicesBlue Swirl2011-07-201-0/+9
| | | | | | | | | | | Don't compile virtio.c in hwlib, it depends on memory accesses performed in CPU endianness. Make loads and stores in CPU endianness unavailable to devices and poison them to avoid further bugs. Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* irq: Privatize CPU_INTERRUPT_NMI.Richard Henderson2011-05-081-1/+0Star
| | | | | | | | This interrupt name is used by i386, CRIS, and MicroBlaze. Copy the name into each target. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-i386: Privatize some i386-specific interrupt names.Richard Henderson2011-05-081-2/+0Star
| | | | | | | SMI, VIRQ, INIT, SIPI, and MCE are all only used by the i386 port. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-arm: Privatize CPU_INTERRUPT_FIQ.Richard Henderson2011-05-081-1/+0Star
| | | | | | | This interrupt name was only used by the ARM port. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* irq: Remove CPU_INTERRUPT_TIMER.Richard Henderson2011-05-081-1/+0Star
| | | | | | | It is no longer used anywhere. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* irq: Introduce CPU_INTERRUPT_TGT_* defines.Richard Henderson2011-05-081-0/+8
| | | | | | | | | | These defines will be place-holders for cpu-specific functionality. Generic code will, at the end of the patch series, no longer have to concern itself about how SMI, NMI, etc should be handled. Instead, generic code will know only that the interrupt is internal or external. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* LatticeMico32 target supportMichael Walle2011-03-071-0/+1
| | | | | | | | This patch adds support for the LatticeMico32 softcore processor by Lattice Semiconductor. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* move targphys.h and hw/poison.h inclusion to cpu-common.hPaolo Bonzini2010-04-091-0/+50
With more files from outside the hw/ directory being placed into libhw, avoid the need to include hw/hw.h for the sake of targ_phys_addr_t. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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