| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | target-alpha: Remove cpu_unique, cpu_sysval, cpu_usp | Richard Henderson | 2014-04-17 | 1 | -19/+18 |
| | | | | | | | | | | | | | | Technically, these variables could have been referenced both via offsets from env and as TCG registers, which would be illegal. Of course, that could only be done from PALcode, and ours doesn't do that. But honestly, these are used infrequently enough that they don't really need to be TCG registers. We wind up with exactly the same code if we follow the letter of the law and issue explicit ld/st. Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Tidy alpha_translate_init | Richard Henderson | 2014-04-17 | 1 | -35/+43 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Don't issue goto_tb under singlestep | Richard Henderson | 2014-04-17 | 1 | -1/+2 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Use non-local temps for zero/sink | Richard Henderson | 2014-04-17 | 1 | -2/+2 |
| | | | | | | | These values are no longer live across branches. Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Use extract to get insn fields | Richard Henderson | 2014-04-17 | 1 | -27/+22 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert mfpr/mtpr to source/sink | Richard Henderson | 2014-04-17 | 1 | -33/+19 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert gen_cpys et al to source/sink | Richard Henderson | 2014-04-17 | 1 | -76/+24 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert gen_fcvtlq/ql to source/sink | Richard Henderson | 2014-04-17 | 3 | -50/+36 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert gen_fcmov to source/sink | Richard Henderson | 2014-04-17 | 1 | -30/+14 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert gen_bcond to source/sink | Richard Henderson | 2014-04-17 | 1 | -18/+6 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert most ieee insns to source/sink | Richard Henderson | 2014-04-17 | 1 | -52/+17 |
| | | | | | | | | This one fixes a bug, previously noted as supressing exceptions in the (unlikely) case the destination register was $f31. Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert gen_ieee_input to source/sink | Richard Henderson | 2014-04-17 | 1 | -19/+13 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert MVIOP2 to source/sink | Richard Henderson | 2014-04-17 | 1 | -19/+4 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert ARITH3 to source/sink | Richard Henderson | 2014-04-17 | 1 | -69/+39 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert FARITH3 to source/sink | Richard Henderson | 2014-04-17 | 1 | -53/+12 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert FARITH2 to source/sink | Richard Henderson | 2014-04-17 | 1 | -32/+11 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert gen_zap/not to source/sink | Richard Henderson | 2014-04-17 | 1 | -30/+11 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert gen_ins_h/l to source/sink | Richard Henderson | 2014-04-17 | 1 | -61/+50 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert gen_ext_h/l to source/sink | Richard Henderson | 2014-04-17 | 1 | -40/+26 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert gen_msk_h/l to source/sink | Richard Henderson | 2014-04-17 | 1 | -28/+19 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert gen_cmov to source/sink | Richard Henderson | 2014-04-17 | 1 | -44/+22 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert ARITH3_EX to source/sink | Richard Henderson | 2014-04-17 | 1 | -43/+6 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert gen_cmp to source/sink | Richard Henderson | 2014-04-17 | 1 | -35/+5 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert gen_store_conditional to source/sink | Richard Henderson | 2014-04-17 | 1 | -5/+1 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert gen_load/store_mem to source/sink | Richard Henderson | 2014-04-17 | 1 | -38/+29 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert opcode 0x1F to source/sink | Richard Henderson | 2014-04-17 | 1 | -20/+10 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert opcode 0x1E to source/sink | Richard Henderson | 2014-04-17 | 1 | -2/+4 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert opcode 0x1C to source/sink | Richard Henderson | 2014-04-17 | 1 | -54/+19 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert opcode 0x1B to source/sink | Richard Henderson | 2014-04-17 | 1 | -19/+13 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert opcode 0x1A to source/sink | Richard Henderson | 2014-04-17 | 1 | -5/+4 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert opcode 0x18 to source/sink | Richard Henderson | 2014-04-17 | 1 | -9/+9 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert opcode 0x17 to source/sink | Richard Henderson | 2014-04-17 | 1 | -21/+20 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert opcode 0x14 to source/sink | Richard Henderson | 2014-04-17 | 1 | -26/+18 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert opcode 0x13 to source/sink | Richard Henderson | 2014-04-17 | 1 | -39/+10 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert opcode 0x12 to source/sink | Richard Henderson | 2014-04-17 | 1 | -36/+27 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Convert opcode 0x11 to source/sink | Richard Henderson | 2014-04-17 | 1 | -89/+37 |
| | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Introduce functions for source/sink | Richard Henderson | 2014-04-17 | 1 | -233/+163 |
| | | | | | | | | This will allow cleaner handling of $31 and $f31. Convert opcodes 0x08, 0x09, 0x10 as examples. Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Introduce REQUIRE_REG_31 | Richard Henderson | 2014-04-17 | 1 | -26/+44 |
| | | | | | | | | | We were missing quite a few checks for Ra or Rb required to be 31. Further, the one place we did check we also checked for no literal operand and the Handbook says nothing about that. Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: Introduce REQUIRE_TB_FLAG | Richard Henderson | 2014-04-17 | 1 | -184/+133 |
| | | | | | | | | The methods by which we check for cpu features varied wildly across the function. Using a nice macro cleans this up. Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: fix the braces | Paolo Bonzini | 2014-04-17 | 1 | -133/+180 |
| | | | | | | | | | Conform to coding style, and avoid further occurrences of bugs due to misplaced braces. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net> | ||||
| * | target-alpha: fix subl and s8subl indentation | Paolo Bonzini | 2014-03-17 | 1 | -1/+2 |
| | | | | | | | | | Two missing braces, one close and one open, fabulously let the code compile. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> | ||||
| * | cputlb: Change tlb_set_page() argument to CPUState | Andreas Färber | 2014-03-13 | 1 | -1/+1 |
| | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> | ||||
| * | cputlb: Change tlb_flush() argument to CPUState | Andreas Färber | 2014-03-13 | 2 | -2/+2 |
| | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> | ||||
| * | cputlb: Change tlb_flush_page() argument to CPUState | Andreas Färber | 2014-03-13 | 1 | -1/+1 |
| | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> | ||||
| * | exec: Change cpu_abort() argument to CPUState | Andreas Färber | 2014-03-13 | 1 | -1/+1 |
| | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> | ||||
| * | translate-all: Change cpu_restore_state() argument to CPUState | Andreas Färber | 2014-03-13 | 2 | -6/+3 |
| | | | | | | | This lets us drop some local variables in tlb_fill() functions. Signed-off-by: Andreas Färber <afaerber@suse.de> | ||||
| * | cpu-exec: Change cpu_loop_exit() argument to CPUState | Andreas Färber | 2014-03-13 | 2 | -4/+4 |
| | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> | ||||
| * | exec: Change tlb_fill() argument to CPUState | Andreas Färber | 2014-03-13 | 1 | -3/+5 |
| | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> | ||||
| * | cpu: Move breakpoints field from CPU_COMMON to CPUState | Andreas Färber | 2014-03-13 | 1 | -2/+2 |
| | | | | | | | | | Most targets were using offsetof(CPUFooState, breakpoints) to determine how much of CPUFooState to clear on reset. Use the next field after CPU_COMMON instead, if any, or sizeof(CPUFooState) otherwise. Signed-off-by: Andreas Färber <afaerber@suse.de> | ||||
| * | cpu: Move exception_index field from CPU_COMMON to CPUState | Andreas Färber | 2014-03-13 | 2 | -7/+15 |
| | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> | ||||
 |
index : bwlp/qemu.git | |
| Experimental fork of QEMU with video encoding patches | OpenSLX |
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path: root/target-alpha