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path: root/target-arm/cpu.c
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* include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster2016-03-221-0/+1
* target-arm: cpu: Move cpu_is_big_endian to headerPeter Crosthwaite2016-03-041-16/+3Star
* target-arm: implement SCTLR.B, drop bswap_codePaolo Bonzini2016-03-041-1/+1
* target-arm: Add the pmceid0 and pmceid1 registersAlistair Francis2016-02-181-0/+2
* target-arm: Implement checking of fired watchpointSergey Fedorov2016-02-111-0/+1
* target-arm: Don't report presence of EL2 if it doesn't existPeter Maydell2016-02-031-0/+9
* gdb: provide the name of the architecture in the target.xmlDavid Hildenbrand2016-01-271-0/+12
* target-arm: Implement cpu_get_phys_page_attrs_debugPeter Maydell2016-01-211-1/+1
* target-arm: Implement asidx_from_attrsPeter Maydell2016-01-211-0/+1
* target-arm: Add QOM property for Secure memory regionPeter Maydell2016-01-211-0/+32
* target-arm: Clean up includesPeter Maydell2016-01-181-0/+1
* target-arm: support QMP dump-guest-memoryAndrew Jones2016-01-151-0/+2
* error: Strip trailing '\n' from error string arguments (again)Markus Armbruster2016-01-131-1/+1
* target-arm: raise exception on misaligned LDREX operandsAndrew Baumann2015-12-171-0/+1
* qdev: Protect device-list-properties against broken devicesMarkus Armbruster2015-10-091-0/+11
* target-arm: Refactor CPU affinity handlingPavel Fedin2015-09-071-1/+1
* arm: Remove hw_error() usages.Peter Crosthwaite2015-09-071-2/+2
* arm: cpu: assert() on no-EL2 virt IRQ error condition.Peter Crosthwaite2015-09-071-4/+1Star
* target-arm: Add the AArch64 view of the Secure physical timerPeter Maydell2015-08-131-0/+2
* target-arm: Add debug check for mismatched cpreg resetsPeter Maydell2015-08-131-0/+23
* target-arm: Add the Hypervisor timerEdgar E. Iglesias2015-08-131-0/+2
* disas: arm: QOMify target specific disas setupPeter Crosthwaite2015-07-091-0/+35
* cpu: Change cpu_exec_init() arg to cpu, not envPeter Crosthwaite2015-07-091-1/+1
* cpu: Add Error argument to cpu_exec_init()Bharata B Rao2015-07-091-1/+1
* Include qapi/qmp/qerror.h exactly where neededMarkus Armbruster2015-06-221-1/+0Star
* target-arm: Add support for Cortex-R5Peter Crosthwaite2015-06-191-0/+38
* target-arm: Add registers for PMSAv7Peter Crosthwaite2015-06-191-0/+6
* target-arm/helper.c: define MPUIR registerPeter Crosthwaite2015-06-191-0/+18
* target-arm: Do not reset sysregs marked as ALIASSergey Fedorov2015-06-191-1/+1
* target-arm: Add the Cortex-M4 CPUAurelio C. Remonda2015-06-191-0/+11
* arm: Add has-mpu propertyPeter Crosthwaite2015-06-151-0/+13
* target-arm: Add the THUMB_DSP featureAurelio C. Remonda2015-06-151-0/+4
* target-arm: Use the kernel's idea of MPIDR if we're using KVMPavel Fedin2015-06-151-0/+12
* target-arm: Update interrupt handling to use target ELGreg Bellows2015-05-291-20/+41
* target-arm: Move setting of exception info into tlb_fillPeter Maydell2015-05-291-0/+17
* target-arm: Adjust id_aa64pfr0 when has_el3 CPU property disabledSergey Fedorov2015-04-261-1/+2
* target-arm: rename c1_coproc to cpacr_el1Sergey Fedorov2015-04-261-2/+2
* target-arm: Add CPU property to disable AArch64Greg Bellows2015-02-131-1/+4
* target-arm: Guest cpu endianness determination for virtio KVM ARM/ARM64Pranavkumar Sawargaonkar2015-02-051-0/+24
* target-arm: Change reset to highest available ELGreg Bellows2015-02-051-1/+8
* target-arm: add cpu feature EL3 to CPUs with Security ExtensionsFabian Aggeler2014-12-231-0/+4
* target-arm: Add ARMCPU secure propertyGreg Bellows2014-12-231-0/+23
* target-arm: Add feature unset functionGreg Bellows2014-12-231-0/+5
* target-arm: make IFAR/DFAR bankedFabian Aggeler2014-12-111-1/+1
* target-arm: add SCTLR_EL3 and make SCTLR bankedFabian Aggeler2014-12-111-2/+6
* target-arm: Separate out M profile cpu_exec_interrupt handlingPeter Maydell2014-11-041-10/+39
* target-arm: Correct sense of the DCZID DZP bitPeter Maydell2014-10-241-2/+2
* target-arm: add emulation of PSCI calls for system emulationRob Herring2014-10-241-3/+7
* target-arm: do not set do_interrupt handlers for ARM and AArch64 user modesRob Herring2014-10-241-1/+1
* target-arm: add powered off cpu stateRob Herring2014-10-241-1/+7
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