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path: root/target-arm/cpu64.c
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* target-arm: Fix REVIDR reset valueSergey Fedorov2015-06-151-0/+2
* target-arm/kvm64: Add cortex-a53 cpu supportShannon Zhao2015-06-151-0/+1
* target-arm: cpu64: Add support for Cortex-A53Peter Crosthwaite2015-05-181-0/+51
* target-arm: cpu64: generalise name of A57 regsPeter Crosthwaite2015-05-181-5/+5
* target-arm: Add missing compatible property to A57Ryota Ozaki2015-03-111-0/+1
* target-arm: Add CPU property to disable AArch64Greg Bellows2015-02-131-0/+39
* target-arm: Report a valid L1Ip field in CTR_EL0 for CPU type "any"Peter Maydell2014-10-241-1/+1
* target-arm: do not set do_interrupt handlers for ARM and AArch64 user modesRob Herring2014-10-241-0/+2
* target-arm: Use cpu_exec_interrupt qom hookRichard Henderson2014-09-251-0/+1
* target-arm: Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register valuesPeter Maydell2014-08-291-1/+2
* target-arm: Adjust debug ID registers per-CPUPeter Maydell2014-08-191-0/+1
* target-arm: VFPv4 implies half-precision extensionPeter Maydell2014-06-091-2/+0Star
* target-arm: Clean up handling of ARMv8 optional feature bitsPeter Maydell2014-06-091-0/+10
* target-arm: Remove unnecessary setting of feature bitsPeter Maydell2014-06-091-2/+0Star
* target-arm/cpu64.c: Actually register Cortex-A57 impdef registersPeter Maydell2014-06-091-0/+1
* target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32Peter Maydell2014-04-171-1/+0Star
* target-arm: Handle the CPU being in AArch32 mode in the AArch64 set_pcPeter Maydell2014-04-171-4/+8
* target-arm: Implement CBAR for Cortex-A57Peter Maydell2014-04-171-0/+1
* target-arm: Implement Cortex-A57 implementation-defined system registersPeter Maydell2014-04-171-0/+55
* target-arm: Remove THUMB2EE feature from AArch64 'any' CPUPeter Maydell2014-04-171-1/+0Star
* target-arm: Add Cortex-A57 processorPeter Maydell2014-04-171-0/+43
* target-arm: Implement AArch64 EL1 exception handlingRob Herring2014-04-171-0/+1
* target-arm: A64: Implement DC ZVAPeter Maydell2014-04-171-0/+1
* target-arm: A64: Make cache ID registers visible to AArch64Peter Maydell2014-02-261-0/+1
* target-arm: Switch ARMCPUInfo arrays to use terminator entriesPeter Maydell2014-01-141-9/+6Star
* target-arm: fix build with gcc 4.8.2Michael S. Tsirkin2014-01-081-0/+6
* target-arm: A64: add set_pc cpu methodAlexander Graf2013-12-171-0/+11
* target-arm: Add AArch64 gdbstub supportAlexander Graf2013-09-101-0/+4
* target-arm: Add AArch64 translation stubAlexander Graf2013-09-101-0/+3
* target-arm: Add new AArch64CPUInfo base class and subclassesPeter Maydell2013-09-101-0/+111
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