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path: root/target-arm/machine.c
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* target-arm: Raw CPSR writes should skip checks and bank switchingPeter Maydell2016-02-261-2/+0Star
* target-arm: Add write_type argument to cpsr_write()Peter Maydell2016-02-261-1/+1
* target-arm: Clean up includesPeter Maydell2016-01-181-0/+1
* error: Strip trailing '\n' from error string arguments (again)Markus Armbruster2016-01-131-2/+2
* hw/intc: Initial implementation of vGICv3Pavel Fedin2015-09-241-0/+18
* target-arm: kvm: Differentiate registers based on write-back levelsChristoffer Dall2015-07-211-1/+1
* target-arm: Add registers for PMSAv7Peter Crosthwaite2015-06-191-0/+34
* migration: Use normal VMStateDescriptions for SubsectionsJuan Quintela2015-06-121-16/+10Star
* vmstate: accept QEMUTimer in VMSTATE_TIMER*, add VMSTATE_TIMER_PTR*Paolo Bonzini2015-01-261-2/+2
* target-arm: Support save/load for 64 bit CPUsPeter Maydell2014-12-111-3/+19
* target-arm: increase arrays of registers R13 & R14Fabian Aggeler2014-10-241-2/+2
* target-arm: add powered off cpu stateRob Herring2014-10-241-2/+3
* target-arm: Implement setting guest breakpointsPeter Maydell2014-09-291-0/+1
* target-arm: Implement setting of watchpointsPeter Maydell2014-09-121-0/+3
* target-arm: Add SPSR entries for EL2/HYP and EL3/MONEdgar E. Iglesias2014-05-271-3/+3
* target-arm: A64: Add ELR entries for EL2 and 3Edgar E. Iglesias2014-05-271-3/+3
* target-arm: A64: Add SP entries for EL2 and 3Edgar E. Iglesias2014-05-271-3/+3
* target-arm: Make elr_el1 an arrayEdgar E. Iglesias2014-05-271-1/+1
* savevm: Remove all the unneeded version_minimum_id_old (arm)Juan Quintela2014-05-131-5/+0Star
* vmstate: s/VMSTATE_INT32_LE/VMSTATE_INT32_POSITIVE_LE/Michael S. Tsirkin2014-05-051-1/+1
* target-arm: Implement AArch64 SPSR_EL1Peter Maydell2014-04-171-4/+4
* target-arm: Implement SP_EL0, SP_EL1Peter Maydell2014-04-171-3/+4
* target-arm: Add AArch64 ELR_EL1 register.Peter Maydell2014-04-171-3/+4
* target-arm: Define exception record for AArch64 exceptionsPeter Maydell2014-04-171-0/+3
* target-arm: Add missing 'static' attributeStefan Weil2014-03-271-1/+1
* target-arm: Widen exclusive-access support struct fields to 64 bitsPeter Maydell2014-01-081-6/+6
* target-arm: Prepare translation for AArch64 codeAlexander Graf2013-09-101-4/+4
* target-arm: Implement the generic timerPeter Maydell2013-08-201-3/+5
* target-arm: Initialize cpreg list from KVM when using KVMPeter Maydell2013-06-251-5/+25
* target-arm: Convert TCG to using (index,value) list for cp migrationPeter Maydell2013-06-251-47/+67
* target-arm: Correctly restore FPSCRPeter Maydell2013-04-191-7/+41
* target-arm: Add some missing CPU state fields to VMStatePeter Maydell2013-04-191-3/+10
* target-arm: port ARM CPU save/load to use VMStateJuan Quintela2013-04-191-213/+174Star
* target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAEPeter Maydell2012-07-121-0/+6
* target-arm: Extend feature flags to 64 bitsPeter Maydell2012-07-121-2/+2
* target-arm: Remove c0_cachetype CPUARMState fieldPeter Maydell2012-06-201-2/+0Star
* arm: Add dummy support for co-processor 15's secure config registerRob Herring2012-01-131-0/+2
* arm: add dummy A9-specific cp15 registersMark Langsdorf2012-01-051-0/+6
* target-arm/machine.c: Restore VFP registers correctlyDmitry Koshelev2011-10-191-1/+1
* target-arm: Minimal implementation of performance countersPeter Maydell2011-06-221-0/+12
* target-arm: Implement cp15 VA->PA translationAdam Lackorzynski2011-03-061-0/+2
* Save/restore ARMv6 MMU statePaul Brook2009-07-311-1/+21
* Convert machine registration to use module init functionsAnthony Liguori2009-05-211-25/+0Star
* Syborg (Symbian Virtual Platform) boardPaul Brook2009-05-151-0/+1
* ARM: basic SX1-cellphone sysemu support (Jean-Christophe PLAGNIOL-VILLARD).balrog2008-12-151-0/+2
* Remove unnecessary trailing newlinesblueswir12008-12-131-2/+0Star
* Move CPU save/load registration to common code.pbrook2008-06-301-1/+1
* Provide basic emulation for Sharp SL-6000 PDA (Tosa), Dmitry Baryshkov.balrog2008-06-021-0/+1
* Add N810 to allowed -M values, add documentation part for N8x0.balrog2008-05-181-0/+1
* remove target ifdefs from vl.caurel322008-05-041-0/+213
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