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* target-arm: Make the 64-bit version of VTCR do the migrationPeter Maydell2016-04-041-1/+5
* target-arm: Remove incorrect ALIAS tags from ESR_EL2 and ESR_EL3Peter Maydell2016-04-041-2/+0Star
* target-arm: Correctly reset SCTLR_EL3 for 64-bit CPUsPeter Maydell2016-04-041-10/+13
* arm: implement query-gic-capabilitiesPeter Xu2016-03-301-1/+57
* arm: enhance kvm_arm_create_scratch_host_vcpuPeter Xu2016-03-302-3/+18
* arm: qmp: add query-gic-capabilities interfacePeter Xu2016-03-302-1/+29
* target-arm: dfilter support for in_asmAlex Bennée2016-03-222-2/+4
* util: move declarations out of qemu-common.hVeronia Bahaa2016-03-221-0/+1
* include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster2016-03-222-0/+2
* target-arm: Fix translation level on early translation faultsSergey Sorokin2016-03-161-10/+12
* target-arm: Implement MRS (banked) and MSR (banked) instructionsPeter Maydell2016-03-163-3/+366
* target-arm: Only trap SRS from S-EL1 if specified mode is MONRalf-Philipp Weinmann2016-03-041-1/+2
* target-arm: implement BE32 mode in system emulationPaolo Bonzini2016-03-042-18/+73
* target-arm: implement setendPaolo Bonzini2016-03-043-8/+12
* target-arm: introduce tbflag for endiannessPeter Crosthwaite2016-03-043-2/+9
* target-arm: a64: Add endianness supportPeter Crosthwaite2016-03-041-19/+30
* target-arm: introduce disas flag for endiannessPaolo Bonzini2016-03-043-15/+26
* target-arm: pass DisasContext to gen_aa32_ld*/st*Paolo Bonzini2016-03-041-128/+142
* target-arm: implement SCTLR.EEPeter Crosthwaite2016-03-041-2/+21
* linux-user: arm: handle CPSR.E correctly in strex emulationPaolo Bonzini2016-03-041-0/+11
* arm: cpu: handle BE32 user-mode as BEPeter Crosthwaite2016-03-041-1/+16
* target-arm: cpu: Move cpu_is_big_endian to headerPeter Crosthwaite2016-03-042-16/+22
* target-arm: implement SCTLR.B, drop bswap_codePaolo Bonzini2016-03-047-29/+60
* target-arm: Correct handling of writes to CPSR mode bits from gdb in usermodePeter Maydell2016-03-041-2/+9
* tcg: Add type for vCPU pointersLluís Vilanova2016-03-012-2/+2
* target-arm: Make reserved ranges in ID_AA64* spaces RAZ, not UNDEFPeter Maydell2016-02-262-7/+122
* target-arm: Mark CNTHP_TVAL_EL2 as ARM_CP_NO_RAWEdgar E. Iglesias2016-02-261-1/+1
* target-arm: Implement MDCR_EL3.TPM and MDCR_EL2.TPM trapsPeter Maydell2016-02-261-7/+36
* target-arm: Fix handling of SDCR for 32-bit codePeter Maydell2016-02-262-8/+19
* target-arm: Make Monitor->NS PL1 mode changes illegal if HCR.TGE is 1Peter Maydell2016-02-261-0/+10
* target-arm: Make mode switches from Hyp via CPS and MRS illegalPeter Maydell2016-02-261-2/+10
* target-arm: In v8, make illegal AArch32 mode changes set PSTATE.ILPeter Maydell2016-02-261-3/+12
* target-arm: Forbid mode switch to Mon from Secure EL1Peter Maydell2016-02-261-1/+1
* target-arm: Add Hyp mode checks to bad_mode_switch()Peter Maydell2016-02-261-0/+3
* target-arm: Add comment about not implementing NSACR.RFRPeter Maydell2016-02-261-0/+3
* target-arm: In cpsr_write() ignore mode switches from User modePeter Maydell2016-02-261-0/+1
* target-arm: Raw CPSR writes should skip checks and bank switchingPeter Maydell2016-02-264-6/+7
* target-arm: Add write_type argument to cpsr_write()Peter Maydell2016-02-267-10/+20
* target-arm: Give CPSR setting on 32-bit exception return its own helperPeter Maydell2016-02-263-3/+10
* all: Clean up includesPeter Maydell2016-02-232-2/+0Star
* target-arm: Add PMUSERENR_EL0 registerAlistair Francis2016-02-181-0/+6
* target-arm: Add the pmovsclr_el0 and pmintenclr_el1 registersAlistair Francis2016-02-181-0/+12
* target-arm: Add the pmceid0 and pmceid1 registersAlistair Francis2016-02-184-0/+22
* target-arm: UNDEF in the UNPREDICTABLE SRS-from-System casePeter Maydell2016-02-182-4/+13
* target-arm: Combine user-only and softmmu get/set_r13_banked()Peter Maydell2016-02-181-19/+0Star
* target-arm: Move bank_number() into internals.hPeter Maydell2016-02-182-26/+25Star
* target-arm: Move get/set_r13_banked() to op_helper.cPeter Maydell2016-02-182-33/+37
* target-arm: Clean up trap/undef handling of SRSPeter Maydell2016-02-181-5/+61
* target-arm: Report correct syndrome for FPEXC32_EL2 trapsPeter Maydell2016-02-183-2/+20
* target-arm: Implement MDCR_EL3.TDA and MDCR_EL2.TDA trapsPeter Maydell2016-02-181-9/+30
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