summaryrefslogtreecommitdiffstats
path: root/target-arm
Commit message (Expand)AuthorAgeFilesLines
* target-arm: A64: support for ld/st/cl exclusiveMichael Matz2014-01-081-3/+153
* target-arm: Widen exclusive-access support struct fields to 64 bitsPeter Maydell2014-01-083-36/+49
* target-arm: aarch64: add support for ld litAlexander Graf2014-01-081-2/+45
* target-arm: A64: add support for conditional compare insnsClaudio Fontana2014-01-081-13/+60
* target-arm: A64: add support for add/sub with carryClaudio Fontana2014-01-081-2/+103
* target-arm: Widen thread-local register state fields to 64 bitsPeter Maydell2014-01-072-10/+30
* target-arm: A64: Implement minimal set of EL0-visible sysregsPeter Maydell2014-01-073-1/+115
* target-arm: A64: Implement MRS/MSR/SYS/SYSLPeter Maydell2014-01-071-30/+82
* target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoderPeter Maydell2014-01-075-12/+17
* target-arm: Update generic cpreg code for AArch64Peter Maydell2014-01-043-9/+211
* target-arm: Pull "add one cpreg to hashtable" into its own functionPeter Maydell2014-01-041-42/+52
* target-arm: A64: implement FMOVPeter Maydell2013-12-241-1/+85
* target-arm: A64: Add decoder skeleton for FP instructionsPeter Maydell2013-12-241-1/+169
* target-arm: A64: implement SVC, BRKAlexander Graf2013-12-241-2/+49
* target-arm: A64: add support for 3 src data proc insnsAlexander Graf2013-12-241-2/+95
* target-arm: A64: add support for move wide instructionsAlex Bennée2013-12-241-2/+49
* target-arm: A64: add support for add, addi, sub, subiAlex Bennée2013-12-241-6/+286
* target-arm: A64: add support for ld/st with indexAlex Bennée2013-12-241-1/+124
* target-arm: A64: add support for ld/st with reg offsetAlex Bennée2013-12-241-1/+143
* target-arm: A64: add support for ld/st unsigned immAlex Bennée2013-12-241-1/+88
* target-arm: A64: add support for ld/st pairPeter Maydell2013-12-241-2/+277
* target-arm: A64: add support for logical (immediate) insnsAlexander Graf2013-12-171-2/+173
* target-arm: A64: add support for 1-src CLS insnClaudio Fontana2013-12-173-1/+31
* target-arm: A64: add support for bitfield insnsClaudio Fontana2013-12-171-2/+54
* target-arm: A64: add support for 1-src REV insnsClaudio Fontana2013-12-171-1/+72
* target-arm: A64: add support for 1-src RBIT insnAlexander Graf2013-12-173-0/+39
* target-arm: A64: add support for 1-src data processing and CLZClaudio Fontana2013-12-173-2/+56
* target-arm: A64: add support for 2-src shift reg insnsAlexander Graf2013-12-171-0/+22
* target-arm: A64: add support for 2-src data processing and DIVAlexander Graf2013-12-173-2/+93
* target-arm: A64: add support for EXTRAlexander Graf2013-12-171-2/+47
* target-arm: A64: add support for ADR and ADRPAlexander Graf2013-12-171-2/+23
* target-arm: A64: add support for logical (shifted register)Alexander Graf2013-12-171-6/+191
* target-arm: A64: add support for conditional selectClaudio Fontana2013-12-171-2/+65
* target-arm: A64: add support for compare and branch immAlexander Graf2013-12-171-2/+44
* target-arm: A64: add support for 'test and branch' immAlexander Graf2013-12-171-2/+25
* target-arm: A64: add support for conditional branchesAlexander Graf2013-12-173-7/+38
* target-arm: A64: add support for BR, BLR and RET insnsAlexander Graf2013-12-171-2/+41
* target-arm: A64: add support for B and BL insnsAlexander Graf2013-12-172-2/+65
* target-arm: A64: expand decoding skeleton for system instructionsClaudio Fontana2013-12-171-2/+129
* target-arm: A64: provide skeleton for a64 insn decodingClaudio Fontana2013-12-171-8/+362
* target-arm: A64: add stubs for a64 specific helpersAlexander Graf2013-12-174-1/+48
* target-arm: Support fp registers in gdb stubPeter Maydell2013-12-171-1/+47
* target-arm: A64: provide functions for accessing FPCR and FPSRPeter Maydell2013-12-171-0/+28
* target-arm: A64: add set_pc cpu methodAlexander Graf2013-12-171-0/+11
* target-arm: Split A64 from A32/T32 gen_intermediate_code_internal()Peter Maydell2013-12-173-45/+246
* target-arm: Add minimal KVM AArch64 supportMian M. Hamayun2013-12-173-0/+209
* target-arm: Clean up handling of AArch64 PSTATEPeter Maydell2013-12-174-18/+74
* target-arm/kvm: Split 32 bit only code into its own filePeter Maydell2013-12-173-491/+516
* ARM: arm_cpu_reset: make it possible to use high vectors for reset_excAntony Pavlov2013-12-171-0/+5
* ARM: cpu: add "reset_hivecs" propertyAntony Pavlov2013-12-172-0/+14
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2025-01-21 07:14:56 +0100