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* target-i386: kvm: Print warning when clearing mcg_cap bitsEduardo Habkost2015-11-261-1/+7
* target-i386: kvm: Use env->mcg_cap when setting up MCEEduardo Habkost2015-11-262-7/+6Star
* target-i386: kvm: Abort if MCE bank count is not supported by hostEduardo Habkost2015-11-261-3/+6
* target-i386: Disable rdtscp on Opteron_G* CPU modelsEduardo Habkost2015-11-171-4/+8
* target-i386: Fix mulx for identical target regsRichard Henderson2015-11-171-1/+3
* target-i386: Add clflushopt/clwb/pcommit to TCG_7_0_EBX_FEATURESXiao Guangrong2015-11-061-1/+3
* target-i386: tcg: Check right CPUID bits for clflushopt/pcommitEduardo Habkost2015-11-061-8/+20
* target-i386: tcg: Accept clwb instructionEduardo Habkost2015-11-061-1/+12
* target-i386: Enable clflushopt/clwb/pcommit instructionsXiao Guangrong2015-11-052-2/+5
* target-i386: Remove POPCNT from qemu64 and qemu32 CPU modelsEduardo Habkost2015-11-051-2/+2
* target-i386: Remove ABM from qemu64 CPU modelEduardo Habkost2015-11-051-2/+1Star
* target-i386: Remove SSE4a from qemu64 CPU modelEduardo Habkost2015-11-051-1/+1
* kvmclock: add a new function to update env->tsc.Liang Li2015-11-052-0/+46
* osdep: Rename qemu_{get, set}_version() to qemu_{, set_}hw_version()Eduardo Habkost2015-11-041-1/+1
* target-i386: fix pcmpxstrx equal-ordered (strstr) modePaolo Bonzini2015-11-041-2/+2
* target-*: Advance pc after recognizing a breakpointRichard Henderson2015-10-281-0/+5
* target-i386: Enable "check" mode by defaultEduardo Habkost2015-10-271-1/+1
* target-i386: Don't left shift negative constantEduardo Habkost2015-10-271-1/+1
* target-i386: Use 1UL for bit shiftEduardo Habkost2015-10-231-1/+1
* target-i386: Add DE to TCG_FEATURESEduardo Habkost2015-10-231-1/+1
* target-i386: Ensure always-1 bits on DR6 can't be clearedEduardo Habkost2015-10-231-1/+1
* target-i386: Check CR4[DE] for processing DR4/DR5Richard Henderson2015-10-234-11/+50
* target-i386: Handle I/O breakpointsEduardo Habkost2015-10-234-28/+94
* target-i386: Optimize setting dr[0-3]Richard Henderson2015-10-231-3/+8
* target-i386: Move hw_*breakpoint_* functionsRichard Henderson2015-10-232-28/+28
* target-i386: Ensure bit 10 on DR7 is never clearedEduardo Habkost2015-10-231-0/+2
* target-i386: Re-introduce optimal breakpoint removalRichard Henderson2015-10-231-6/+28
* target-i386: Introduce cpu_x86_update_dr7Richard Henderson2015-10-234-22/+27
* target-i386: Disable cache info passthrough by defaultEduardo Habkost2015-10-231-3/+1Star
* target-i386: allow any alignment for SMBASEPaolo Bonzini2015-10-231-2/+2
* kvm: Allow the Hyper-V vendor ID to be specifiedAlex Williamson2015-10-193-1/+15
* kvm: Move x86-specific functions into target-i386/kvm.cThomas Huth2015-10-191-5/+26
* kvm: Pass PCI device pointer to MSI routing functionsPavel Fedin2015-10-191-1/+1
* target-i386/kvm: Hyper-V HV_X64_MSR_VP_RUNTIME supportAndrey Smetanin2015-10-125-1/+43
* target-i386/kvm: set Hyper-V features cpuid bit HV_X64_MSR_VP_INDEX_AVAILABLEAndrey Smetanin2015-10-123-1/+12
* target-i386/kvm: Hyper-V HV_X64_MSR_RESET supportAndrey Smetanin2015-10-123-2/+12
* qdev: Protect device-list-properties against broken devicesMarkus Armbruster2015-10-091-0/+8
* tcg: Remove gen_intermediate_code_pcRichard Henderson2015-10-071-44/+5Star
* tcg: Pass data argument to restore_state_to_opcRichard Henderson2015-10-071-20/+6Star
* tcg: Add TCG_MAX_INSNSRichard Henderson2015-10-071-1/+5
* target-*: Drop cpu_gen_code defineRichard Henderson2015-10-071-1/+0Star
* target-i386: Add cc_op state to insn_startRichard Henderson2015-10-072-1/+2
* target-*: Introduce and use cpu_breakpoint_testRichard Henderson2015-10-071-10/+7Star
* target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson2015-10-071-2/+3
* target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson2015-10-071-3/+2Star
* tcg: Rename debug_insn_start to insn_startRichard Henderson2015-10-071-1/+1
* cpu/apic: drop icc bus/bridgeChen Fan2015-10-021-8/+1Star
* apic: move APIC's MMIO region mapping into APICChen Fan2015-10-021-0/+15
* Correctly re-init EFER state during INIT IPIBill Paul2015-10-021-1/+1
* target-i386: add ABM to Haswell* and Broadwell* CPU modelsPaolo Bonzini2015-10-021-4/+4
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