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* target-i386: Remove has_msr_* global vars for KVM featuresEduardo Habkost2016-09-271-15/+6Star
* target-i386: Clear KVM CPUID features if KVM is disabledEduardo Habkost2016-09-271-0/+4
* target-i386: Remove has_msr_hv_tsc global variableEduardo Habkost2016-09-271-6/+8
* target-i386: Remove has_msr_hv_apic global variableEduardo Habkost2016-09-271-5/+3Star
* target-i386: Remove has_msr_mtrr global variableEduardo Habkost2016-09-271-6/+2Star
* target-i386: Move xsave component mask to features arrayEduardo Habkost2016-09-272-15/+30
* target-i386: xsave: Calculate set of xsave components on realizeEduardo Habkost2016-09-272-23/+33
* target-i386: xsave: Helper function to calculate xsave area sizeEduardo Habkost2016-09-271-7/+15
* target-i386: xsave: Simplify CPUID[0xD,0].{EAX,EDX} calculationEduardo Habkost2016-09-271-6/+2Star
* target-i386: xsave: Calculate enabled components only onceEduardo Habkost2016-09-271-10/+16
* target-i386: Don't try to enable PT State xsave componentEduardo Habkost2016-09-271-3/+3
* target-i386: Move feature name arrays inside FeatureWordInfoEduardo Habkost2016-09-271-200/+170Star
* linux-user: remove #define smp_{cores, threads}Marc-André Lureau2016-09-271-4/+4
* target-i386: Enable CPUID[0x8000000A] if SVM is enabledEduardo Habkost2016-09-271-0/+4
* target-i386: Automatically set level/xlevel/xlevel2 when neededEduardo Habkost2016-09-272-13/+83
* target-i386: Add a marker to end of the region zeroed on resetEduardo Habkost2016-09-272-1/+2
* target-i386: Remove unused X86CPUDefinition::xlevel2 fieldEduardo Habkost2016-09-271-2/+0Star
* kvm: fix events.flags (KVM_VCPUEVENT_VALID_SMM) overwritten by 0Herongguang (Stephen)2016-09-221-1/+1
* kvm: apic: set APIC base as part of kvm_apic_putDr. David Alan Gilbert2016-09-222-0/+10
* target-i386: introduce kvm_put_one_msrPaolo Bonzini2016-09-221-9/+11
* target-i386: Use struct X86XSaveArea in fpu_helper.cRichard Henderson2016-09-193-58/+67
* target-i386: Generate fences for x86Pranith Kumar2016-09-161-0/+8
* target-i386: Fixed syscall posssible segfaultStanislav Shmarov2016-09-141-17/+19
* target-i386: fix ordering of fields in CPUX86StatePaolo Bonzini2016-09-141-6/+6
* x86/lapic: Load LAPIC state at post_loadDr. David Alan Gilbert2016-09-131-17/+0Star
* target-i386: present virtual L3 cache info for vcpusLongpeng(Mike)2016-09-092-5/+50
* target-i386: Add more Intel AVX-512 instructions supportLuwei Kang2016-09-052-5/+14
* target-i386: kvm: Report kvm_pv_unhalt as unsupported w/o kernel_irqchipEduardo Habkost2016-08-161-0/+7
* trace-events: fix first line comment in trace-eventsLaurent Vivier2016-08-121-1/+1
* error: Strip trailing '\n' from error string arguments (again)Markus Armbruster2016-08-081-1/+1
* target-i386: fix typo in xsetbv implementationDave Hansen2016-08-021-1/+1
* Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell2016-07-212-2/+114
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| * kvm-irqchip: do explicit commit when update irqPeter Xu2016-07-211-0/+1
| * kvm-irqchip: x86: add msi route notify fnPeter Xu2016-07-212-0/+31
| * kvm-irqchip: i386: add hook for add/remove virqPeter Xu2016-07-212-0/+50
| * kvm-irqchip: simplify kvm_irqchip_add_msi_routePeter Xu2016-07-211-2/+1Star
| * intel_iommu: add support for split irqchipPeter Xu2016-07-212-0/+31
* | target-i386: Add x86_cpu_unrealizefn()Igor Mammedov2016-07-201-0/+16
* | pc: cpu: Allow device_add to be used with x86 cpuIgor Mammedov2016-07-201-0/+1
* | target-i386: Fix apic object leak when CPU is deletedIgor Mammedov2016-07-201-0/+1
* | target-i386: cpu: Do not ignore error and fix apic parentIgor Mammedov2016-07-201-2/+3
* | target-i386: Add support for UMIP and RDPID CPUID bitsPaolo Bonzini2016-07-202-2/+4
* | target-i386: Add socket/core/thread properties to X86CPUIgor Mammedov2016-07-202-0/+10
* | target-i386: Replace custom apic-id setter/getter with static propertyIgor Mammedov2016-07-201-39/+6Star
* | pc: cpu: Consolidate apic-id validity checks in pc_cpu_pre_plug()Igor Mammedov2016-07-201-13/+0Star
* | target-i386: Set physical address bits based on hostDr. David Alan Gilbert2016-07-202-10/+65
* | target-i386: Use uint32_t for X86CPU.apic_idIgor Mammedov2016-07-202-3/+8
* | target-i386: Fill high bits of mtrr maskDr. David Alan Gilbert2016-07-203-1/+31
* | target-i386: Mask mtrr mask based on CPU physical address limitsDr. David Alan Gilbert2016-07-201-2/+9
* | target-i386: Allow physical address bits to be setDr. David Alan Gilbert2016-07-202-9/+46
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