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* More MIPS 64-bit FPU support.ths2007-05-191-46/+50
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2834 c046a42c-6fe2-441c-8c8c-71466251a162
* - Move FPU exception handling into helper functions, since they are big.ths2007-05-181-0/+71
| | | | | | | | | - Fix FP-conditional branches. - Check FPU register mode at runtime, not translation time, as the F64 status bit can change. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
* More generic 64 bit multiplication support, by Aurelien Jarno.ths2007-05-161-2/+0Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2821 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS TLB style selection at runtime, by Herve Poussineau.ths2007-05-131-5/+1Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS 64-bit FPU support, plus some collateral bugfixes in theths2007-05-071-0/+6
| | | | | | | conditional branch handling. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2779 c046a42c-6fe2-441c-8c8c-71466251a162
* Kill broken host register definitions, thanks to Paul Brook and Herveths2007-04-291-11/+4Star
| | | | | | | Poussineau for debugging this. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2747 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix qemu SIGFPE caused by division-by-zero due to underflow.ths2007-04-151-1/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2673 c046a42c-6fe2-441c-8c8c-71466251a162
* Actually enable 64bit configuration.ths2007-04-011-4/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162
* Malta CBUS UART support.ths2007-03-311-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2557 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix enough FPU/R2 support to get 24Kf going.ths2007-03-231-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2528 c046a42c-6fe2-441c-8c8c-71466251a162
* SPARC host fixes, by Ben Taylor.ths2007-03-191-10/+0Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2503 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS FPU dynamic activation, part 1, by Herve Poussineau.ths2007-02-281-2/+0Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2463 c046a42c-6fe2-441c-8c8c-71466251a162
* Sparc arm/mips/sparc register patch, by Martin Bochnig.ths2007-02-021-0/+10
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2377 c046a42c-6fe2-441c-8c8c-71466251a162
* Reworking MIPS interrupt handling, by Aurelien Jarno.ths2007-01-241-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2350 c046a42c-6fe2-441c-8c8c-71466251a162
* moved invalidate_tlb() to helper.c as a work around for gcc 3.2.2 bug - ↵bellard2007-01-031-0/+1
| | | | | | suppressed invalid tb_invalidate_page_range() calls git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2287 c046a42c-6fe2-441c-8c8c-71466251a162
* Use memory barriers in FORCE_RET / RETURN.ths2006-12-231-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2273 c046a42c-6fe2-441c-8c8c-71466251a162
* Preliminiary MIPS64 support, disabled by default due to performance impact.ths2006-12-211-1/+47
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2250 c046a42c-6fe2-441c-8c8c-71466251a162
* Add MIPS32R2 instructions, and generally straighten out the instructionths2006-12-061-0/+1
| | | | | | | decoding. This is also the first percent towards MIPS64 support. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2224 c046a42c-6fe2-441c-8c8c-71466251a162
* Dynamically translate MIPS mtc0 instructions.ths2006-12-061-1/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2223 c046a42c-6fe2-441c-8c8c-71466251a162
* Dynamically translate MIPS mfc0 instructions.ths2006-12-061-1/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2222 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS TLB performance improvements, by Daniel Jacobowitz.ths2006-12-061-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2220 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS FPU support (Marius Goeger)bellard2006-06-141-6/+20
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1964 c046a42c-6fe2-441c-8c8c-71466251a162
* Add missing function prototype.pbrook2006-03-111-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1772 c046a42c-6fe2-441c-8c8c-71466251a162
* disable debug modebellard2005-12-171-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1706 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS fixes (Daniel Jacobowitz)bellard2005-12-051-12/+13
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1690 c046a42c-6fe2-441c-8c8c-71466251a162
* moved common softmmu code to common header (Paul Brook)bellard2005-10-301-65/+1Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1580 c046a42c-6fe2-441c-8c8c-71466251a162
* compilation fixbellard2005-07-071-5/+0Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1507 c046a42c-6fe2-441c-8c8c-71466251a162
* correct split between helper.c and op_helper.c - cosmeticsbellard2005-07-051-12/+0Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1505 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS target (Jocelyn Mayer)bellard2005-07-021-0/+183
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1464 c046a42c-6fe2-441c-8c8c-71466251a162
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