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path: root/target-mips/translate_init.c
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* target-mips: add MAAR, MAARI registerYongbok Kim2016-03-301-1/+2
* target-mips: enable CM GCR in MIPS64R6-generic CPULeon Alrae2016-03-301-1/+2
* target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUsLeon Alrae2016-03-231-9/+13
* target-mips: implement R6 multi-threadingYongbok Kim2016-02-261-1/+2
* target-mips: Set Config5.XNP for R6 coresYongbok Kim2015-10-301-2/+2
* target-mips: update mips32r5-generic into P5600Yongbok Kim2015-08-131-24/+29
* target-mips: fix MIPS64R6-generic configurationYongbok Kim2015-07-151-9/+9
* target-mips: add mips32r6-generic CPU definitionYongbok Kim2015-06-261-0/+37
* target-mips: enable XPA and LPA featuresLeon Alrae2015-06-121-6/+10
* target-mips: remove misleading comments in translate_init.cLeon Alrae2015-06-121-9/+0Star
* target-mips: add ERETNC instruction and Config5.LLB bitLeon Alrae2015-06-111-1/+2
* target-mips: Misaligned memory accesses for R6Yongbok Kim2015-06-111-1/+1
* target-mips: add Config5.FRE support allowing Status.FR=0 emulationLeon Alrae2015-06-111-4/+5
* target-mips: add missing MSACSR and restore fp_status and hflagsLeon Alrae2015-03-111-8/+2Star
* target-mips: Make CP0.Status.CU1 read-only for the 5Kc and 5KEc processorsMaciej W. Rozycki2015-02-131-2/+2
* target-mips: Fix formatting in `mips_defs'Maciej W. Rozycki2014-12-161-19/+21
* target-mips: Enable vectored interrupt support for the 74Kf CPUMaciej W. Rozycki2014-12-161-1/+1
* target-mips: Add M14K and M14Kc MIPS32r2 microMIPS processorsMaciej W. Rozycki2014-12-161-0/+41
* target-mips: Add 5KEc and 5KEf MIPS64r2 processorsMaciej W. Rozycki2014-12-161-0/+45
* mips: Set the CP0.Config3.DSP and CP0.Config3.DSP2P bitsMaciej W. Rozycki2014-11-071-3/+5
* target-mips: add MSA support to mips32r5-genericYongbok Kim2014-11-031-2/+2
* target-mips: add msa_reset(), global msa registerYongbok Kim2014-11-031-0/+34
* target-mips: enable features in MIPS64R6-generic CPULeon Alrae2014-11-031-2/+9
* target-mips: add TLBINV supportLeon Alrae2014-11-031-0/+2
* target-mips: update PageGrain and m{t,f}c0 EntryLo{0,1}Leon Alrae2014-11-031-0/+2
* target-mips: define a new generic CPU supporting MIPS64 Release 6 ISALeon Alrae2014-10-141-0/+30
* target-mips: Avoid shifting left into sign bitPeter Maydell2014-03-271-11/+11
* exec: Change cpu_abort() argument to CPUStateAndreas Färber2014-03-131-1/+3
* target-mips: add user-mode FR switch support for MIPS32r5Petar Jovanovic2014-02-101-4/+5
* target-mips: add support for CP0_Config5Petar Jovanovic2014-02-101-1/+11
* target-mips: add support for CP0_Config4Petar Jovanovic2014-02-101-1/+8
* target-mips: add CPU definition for MIPS32R5Petar Jovanovic2014-02-101-0/+25
* target-mips: fix 34Kf configuration for DSP ASEYongbok Kim2013-08-031-4/+3Star
* target-mips: Add ASE DSP processorsJia Liu2012-10-311-0/+52
* mips: Default to using one VPE and one TC.Edgar E. Iglesias2011-09-061-1/+1
* mips: Enable VInt interrupt mode for the 34KfEdgar E. Iglesias2011-09-061-1/+1
* Use glib memory allocation and free functionsAnthony Liguori2011-08-211-2/+2
* Fix typos in comments (interupt -> interrupt)Stefan Weil2011-05-081-1/+1
* Fix typo in code and commentsStefan Weil2011-05-061-1/+1
* target-xxx: Use fprintf_function (format checking)Stefan Weil2010-10-301-1/+1
* Remove unused constantHervé Poussineau2010-07-311-4/+0Star
* MIPS: Initial support of fulong mini pc (CPU definition)Huacai Chen2010-06-291-0/+35
* target-mips: No MIPS16 support for 4Kc, 4KEc coresStefan Weil2009-12-171-3/+3
* target-mips: 4Kc, 4KEc cores do not support MIPS16Stefan Weil2009-12-161-3/+3
* target-mips: fix user-mode emulation startupNathan Froyd2009-12-131-8/+0Star
* target-mips: set Config1.CA for MIPS16-aware CPUsNathan Froyd2009-12-131-9/+18
* target-mips: make CP0_LLAddr register CPU dependentAurelien Jarno2009-11-221-0/+32
* mips: fix cpu_reset memory leakBlue Swirl2009-11-141-50/+0Star
* Revert "Get rid of _t suffix"Anthony Liguori2009-10-011-10/+10
* Get rid of _t suffixmalc2009-10-011-10/+10
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