bwlp/qemu.git - Experimental fork of QEMU with video encoding patches

	Commit message (Expand)	Author	Age	Files	Lines
*	Merge remote-tracking branch 'afaerber/qom-cpu' into staging	Anthony Liguori	2012-11-01	1	-5/+6
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\| *	cpus: Pass CPUState to [qemu_]cpu_has_work()	Andreas Färber	2012-10-31	1	-5/+6
* \|	target-mips: don't flush extra TLB on permissions upgrade	Aurelien Jarno	2012-10-31	1	-5/+23
* \|	target-mips: fix TLBR wrt SEGMask	Aurelien Jarno	2012-10-31	1	-0/+6
* \|	target-mips: use deposit instead of hardcoded version	Aurelien Jarno	2012-10-31	1	-28/+4
* \|	target-mips: optimize ddiv/ddivu/div/divu with movcond	Aurelien Jarno	2012-10-31	1	-48/+37
* \|	target-mips: implement movn/movz using movcond	Aurelien Jarno	2012-10-31	1	-15/+12
* \|	target-mips: don't use local temps for store conditional	Aurelien Jarno	2012-10-31	1	-5/+6
* \|	target-mips: implement unaligned loads using TCG	Aurelien Jarno	2012-10-31	3	-159/+62
* \|	target-mips: simplify load/store microMIPS helpers	Aurelien Jarno	2012-10-31	1	-64/+9
* \|	target-mips: optimize load operations	Aurelien Jarno	2012-10-31	1	-4/+12
* \|	target-mips: cleanup load/store operations	Aurelien Jarno	2012-10-31	1	-64/+35
* \|	target-mips: restore CPU state after an FPU exception	Aurelien Jarno	2012-10-31	1	-90/+95
* \|	target-mips: use softfloat constants when possible	Aurelien Jarno	2012-10-31	1	-48/+44
* \|	target-mips: cleanup float to int conversion helpers	Aurelien Jarno	2012-10-31	1	-39/+79
* \|	target-mips: fix FPU exceptions	Aurelien Jarno	2012-10-31	1	-13/+19
* \|	target-mips: keep softfloat exception set to 0 between instructions	Aurelien Jarno	2012-10-31	1	-63/+10
* \|	target-mips: use the softfloat floatXX_muladd functions	Aurelien Jarno	2012-10-31	3	-105/+64
* \|	target-mips: do not save CPU state when using retranslation	Aurelien Jarno	2012-10-31	1	-20/+0
* \|	target-mips: correctly restore btarget upon exception	Aurelien Jarno	2012-10-31	1	-0/+11
* \|	target-mips: remove #if defined(TARGET_MIPS64) in opcode enums	Aurelien Jarno	2012-10-31	1	-36/+0
* \|	target-mips: Change TODO file	Jia Liu	2012-10-31	1	-2/+1
* \|	target-mips: Add ASE DSP processors	Jia Liu	2012-10-31	1	-0/+52
* \|	target-mips: Add ASE DSP accumulator instructions	Jia Liu	2012-10-31	3	-0/+995
* \|	target-mips: Add ASE DSP compare-pick instructions	Jia Liu	2012-10-31	3	-0/+635
* \|	target-mips: Add ASE DSP bit/manipulation instructions	Jia Liu	2012-10-31	3	-0/+311
* \|	target-mips: Add ASE DSP multiply instructions	Jia Liu	2012-10-31	3	-0/+1499
* \|	target-mips: Add ASE DSP GPR-based shift instructions	Jia Liu	2012-10-31	3	-0/+618
* \|	target-mips: Add ASE DSP arithmetic instructions	Jia Liu	2012-10-31	3	-3/+1812
* \|	target-mips: Add ASE DSP load instructions	Jia Liu	2012-10-31	1	-0/+88
* \|	target-mips: Add ASE DSP branch instructions	Jia Liu	2012-10-31	1	-0/+36
* \|	Use correct acc value to index cpu_HI/cpu_LO rather than using a fix number	Jia Liu	2012-10-31	1	-27/+95
* \|	target-mips: Add ASE DSP resources access check	Jia Liu	2012-10-31	3	-2/+47
* \|	target-mips: Add ASE DSP internal functions	Jia Liu	2012-10-31	2	-1/+1064
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*	target-mips: Use TCG registers for the FPU.	Richard Henderson	2012-10-28	1	-42/+54
*	target-mips: rename helper flags	Aurelien Jarno	2012-10-28	1	-53/+53
*	Rename target_phys_addr_t to hwaddr	Avi Kivity	2012-10-23	3	-18/+18
*	target-mips: Pass MIPSCPU to mips_vpe_sleep()	Andreas Färber	2012-10-17	1	-3/+7
*	target-mips: Pass MIPSCPU to mips_tc_sleep()	Andreas Färber	2012-10-17	1	-3/+5
*	target-mips: Pass MIPSCPU to mips_vpe_is_wfi()	Andreas Färber	2012-10-17	1	-4/+8
*	target-mips: Pass MIPSCPU to mips_tc_wake()	Andreas Färber	2012-10-17	1	-3/+8
*	target-mips: Clean up other_cpu in helper_{d,e}vpe()	Andreas Färber	2012-10-17	1	-14/+14
*	Emit debug_insn for CPU_LOG_TB_OP_OPT as well.	Richard Henderson	2012-09-27	1	-1/+2
*	target-mips: Implement Loongson Multimedia Instructions	Richard Henderson	2012-09-19	4	-4/+1180
*	target-mips: Always evaluate debugging macro arguments	Richard Henderson	2012-09-19	1	-14/+17
*	target-mips: Fix MIPS_DEBUG.	Richard Henderson	2012-09-19	1	-36/+38
*	target-mips: Set opn in gen_ldst_multiple.	Richard Henderson	2012-09-19	1	-0/+6
*	target-mips: switch to AREG0 free mode	Blue Swirl	2012-09-15	5	-1085/+1162
*	MIPS/user: Fix reset CPU state initialization	Maciej W. Rozycki	2012-09-08	3	-62/+52
*	target-mips: allow microMIPS SWP and SDP to have RD equal to BASE	Eric Johnson	2012-08-27	1	-1/+9