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* target-mips: generate fencesLeon Alrae2016-09-231-2/+30
* target-mips: add 24KEc CPU definitionAndré Draszik2016-09-231-0/+22
* tcg: Merge GETPC and GETRARichard Henderson2016-09-161-9/+9
* target-mips: fix EntryHi.EHINV being cleared on TLB exceptionLeon Alrae2016-07-281-0/+1
* kvm-irqchip: i386: add hook for add/remove virqPeter Xu2016-07-211-0/+11
* Clean up ill-advised or unusual header guardsMarkus Armbruster2016-07-122-6/+6
* target-*: Clean up cpu.h header guardsMarkus Armbruster2016-07-121-3/+3
* Fix confusing argument names in some common functionsSergey Sorokin2016-07-122-6/+7
* target-mips: enable 10-bit ASIDs in I6400 CPULeon Alrae2016-07-121-1/+1
* target-mips: support CP0.Config4.AE bitPaul Burton2016-07-122-1/+3
* target-mips: change ASID type to hold more than 8 bitsPaul Burton2016-07-124-12/+12
* target-mips: add ASID mask field and replace magic valuesPaul Burton2016-07-124-17/+23
* target-mips: replace MIPS64R6-generic with the real I6400 CPU modelLeon Alrae2016-07-121-11/+9Star
* target-mips: add exception base to MIPS CPULeon Alrae2016-07-123-4/+13
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2016-06-291-2/+0Star
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| * target-*: Don't redefine cpu_exec()Peter Crosthwaite2016-06-291-2/+0Star
* | target-mips: Add FCR31's FS bit definitionAleksandar Markovic2016-06-241-1/+2
* | target-mips: Implement FCR31's R/W bitmask and related functionalitiesAleksandar Markovic2016-06-245-19/+42
* | target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D>Aleksandar Markovic2016-06-243-48/+461
* | target-mips: Add abs2008 flavor of <ABS|NEG>.<S|D>Aleksandar Markovic2016-06-241-4/+22
* | target-mips: Activate IEEE 754-2008 signaling NaN bit meaning for MSAAleksandar Markovic2016-06-241-1/+2
* | softfloat: Implement run-time-configurable meaning of signaling NaN bitAleksandar Markovic2016-06-246-50/+71
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* Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' int...Peter Maydell2016-06-201-0/+1
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| * exec: [tcg] Track which vCPU is performing translation and executionLluís Vilanova2016-06-201-0/+1
* | coccinelle: Remove unnecessary variables for function return valueEduardo Habkost2016-06-201-3/+1Star
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* os-posix: include sys/mman.hPaolo Bonzini2016-06-161-1/+0Star
* target-*: dfilter support for in_asmRichard Henderson2016-06-051-1/+2
* cpu: move exec-all.h inclusion out of cpu.hPaolo Bonzini2016-05-197-2/+6
* mips: move CP0 functions out of cpu.hPaolo Bonzini2016-05-192-109/+112
* qemu-common: push cpu.h inclusion out of qemu-common.hPaolo Bonzini2016-05-195-17/+23
* hw: move CPU state serialization to migration/cpu.hPaolo Bonzini2016-05-191-1/+1
* target-mips: make cpu-qom.h not target specificPaolo Bonzini2016-05-192-37/+38
* Fix some typos found by codespellStefan Weil2016-05-181-1/+1
* Merge remote-tracking branch 'remotes/lalrae/tags/mips-20160513' into stagingPeter Maydell2016-05-131-1/+1
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| * target-mips: fix call to memset in soft reset codeAurelien Jarno2016-05-121-1/+1
* | tcg: Allow goto_tb to any target PC in user modeSergey Fedorov2016-05-131-5/+15
* | tb: consistently use uint32_t for tb->flagsEmilio G. Cota2016-05-131-1/+1
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* target-mips: Fix RDHWR exception host PCJames Hogan2016-04-281-8/+8
* target-mips: add MAAR, MAARI registerYongbok Kim2016-03-306-3/+113
* target-mips: use CP0_CHECK for gen_m{f|t}hc0Yongbok Kim2016-03-301-25/+21Star
* target-mips: make ITC Configuration Tags accessible to the CPULeon Alrae2016-03-304-12/+100
* target-mips: check CP0 enabled for CACHE instruction also in R6Leon Alrae2016-03-301-0/+1
* hw/mips: implement ITC Configuration Tags and Storage CellsLeon Alrae2016-03-301-0/+1
* target-mips: enable CM GCR in MIPS64R6-generic CPULeon Alrae2016-03-301-1/+2
* hw/mips_malta: add CPS to Malta boardLeon Alrae2016-03-302-0/+11
* target-mips: add CMGCRBase registerYongbok Kim2016-03-302-1/+20
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2016-03-241-0/+1
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| * include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster2016-03-221-0/+1
* | target-mips: indicate presence of IEEE 754-2008 FPU in R6/R5+MSA CPUsLeon Alrae2016-03-233-9/+17
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* tcg: Add type for vCPU pointersLluís Vilanova2016-03-011-1/+1
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