summaryrefslogtreecommitdiffstats
path: root/target-mips
Commit message (Expand)AuthorAgeFilesLines
* target-mips: Copy restrictions from ext/ins to dext/dinsRichard Henderson2015-08-041-20/+25
* target-mips: fix semihosting for microMIPS R6Leon Alrae2015-08-041-3/+7
* target-mips: fix offset calculation for InterruptsYongbok Kim2015-07-282-27/+21Star
* target-mips: fix passing incompatible pointer type in machine.cLeon Alrae2015-07-281-1/+2
* mips/kvm: Sign extend registers written to KVMJames Hogan2015-07-161-4/+4
* mips/kvm: Fix Big endian 32-bit register accessJames Hogan2015-07-161-10/+3Star
* target-mips: fix page fault address for LWL/LWR/LDL/LDRAurelien Jarno2015-07-151-0/+12
* target-mips: fix resource leak reported by CoverityLeon Alrae2015-07-151-4/+19
* target-mips: fix logically dead code reported by CoverityLeon Alrae2015-07-151-0/+3
* target-mips: correct DERET instructionLeon Alrae2015-07-151-2/+1Star
* target-mips: fix ASID synchronisation for MIPS MTAurelien Jarno2015-07-151-1/+1
* target-mips: fix to clear MSACSR.CauseYongbok Kim2015-07-151-0/+6
* target-mips: fix MIPS64R6-generic configurationYongbok Kim2015-07-152-10/+10
* Merge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-peter' into s...Peter Maydell2015-07-092-2/+2
|\
| * cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite2015-07-091-1/+1
| * cpu: Change cpu_exec_init() arg to cpu, not envPeter Crosthwaite2015-07-091-1/+1
| * cpu: Add Error argument to cpu_exec_init()Bharata B Rao2015-07-091-1/+1
* | mips/kvm: Sync with newer MIPS KVM headersJames Hogan2015-07-091-13/+2Star
|/
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2015-07-061-0/+4
|\
| * kvm: First step to push iothread lock out of inner run loopJan Kiszka2015-07-011-0/+4
* | target-mips: add mips32r6-generic CPU definitionYongbok Kim2015-06-261-0/+37
* | target-mips: microMIPS32 R6 POOL16{A, C} instructionsYongbok Kim2015-06-261-15/+118
* | target-mips: microMIPS32 R6 Major instructionsYongbok Kim2015-06-261-17/+45
* | target-mips: microMIPS32 R6 POOL32{I, C} instructionsYongbok Kim2015-06-261-6/+21
* | target-mips: microMIPS32 R6 POOL32F instructionsYongbok Kim2015-06-261-32/+199
* | target-mips: microMIPS32 R6 POOL32A{XF} instructionsYongbok Kim2015-06-261-10/+72
* | target-mips: microMIPS32 R6 branches and jumpsYongbok Kim2015-06-261-40/+202
* | target-mips: add microMIPS32 R6 opcode enumYongbok Kim2015-06-261-16/+103
* | target-mips: signal RI for removed instructions in microMIPS R6Yongbok Kim2015-06-261-0/+68
* | target-mips: raise RI exceptions when FIR.PS = 0Yongbok Kim2015-06-261-33/+45
* | target-mips: rearrange gen_compute_compact_branchYongbok Kim2015-06-261-236/+236
* | target-mips: refactor {D}LSA, {D}ALIGN, {D}BITSWAPYongbok Kim2015-06-261-67/+99
* | target-mips: remove an unused argumentYongbok Kim2015-06-261-3/+2Star
* | target-mips: add microMIPS TLBINV, TLBINVFYongbok Kim2015-06-261-0/+8
* | target-mips: fix {RD, WR}PGPR in microMIPSYongbok Kim2015-06-261-2/+2
* | target-mips: convert host to MIPS errno values when requiredLeon Alrae2015-06-261-11/+33
* | target-mips: add Unified Hosting Interface (UHI) supportLeon Alrae2015-06-264-21/+394
* | target-mips: remove identical code in different branchLeon Alrae2015-06-261-21/+4Star
|/
* disas: Remove uses of CPU envPeter Crosthwaite2015-06-221-1/+1
* target-mips: enable XPA and LPA featuresLeon Alrae2015-06-121-6/+10
* target-mips: remove misleading comments in translate_init.cLeon Alrae2015-06-121-9/+0Star
* target-mips: add MTHC0 and MFHC0 instructionsLeon Alrae2015-06-122-0/+227
* target-mips: add CP0.PageGrain.ELPA supportLeon Alrae2015-06-125-12/+42
* target-mips: support Page Frame Number Extension fieldLeon Alrae2015-06-121-6/+26
* target-mips: extend selected CP0 registers to 64-bits in MIPS32Leon Alrae2015-06-124-42/+63
* target-mips: correct MFC0 for CP0.EntryLo in MIPS64Leon Alrae2015-06-121-6/+6
* target-mips: add ERETNC instruction and Config5.LLB bitLeon Alrae2015-06-115-7/+30
* target-mips: Misaligned memory accesses for MSAYongbok Kim2015-06-113-78/+102
* target-mips: Misaligned memory accesses for R6Yongbok Kim2015-06-112-13/+28
* target-mips: add Config5.FRE support allowing Status.FR=0 emulationLeon Alrae2015-06-114-156/+208
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-18 16:28:45 +0100