summaryrefslogtreecommitdiffstats
path: root/target-ppc/helper_regs.h
Commit message (Expand)AuthorAgeFilesLines
* ppc: Do some batching of TCG tlb flushesBenjamin Herrenschmidt2016-05-301-0/+13
* ppc: Use split I/D mmu modes to avoid flushes on interruptsBenjamin Herrenschmidt2016-05-301-7/+47
* PPC: Only enter MSR_POW when no interrupts pendingAlexander Graf2014-04-081-1/+1
* cputlb: Change tlb_flush() argument to CPUStateAndreas Färber2014-03-131-1/+1
* PPC: Add VSX to hflagsAlexander Graf2013-12-201-1/+1
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-121-4/+7
* Replace always_inline with inlineBlue Swirl2009-08-161-5/+5
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1Star
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
* target-ppc: Convert XER accesses to TCGaurel322008-10-211-18/+0Star
* ppc: cleanup register typesaurel322008-09-041-1/+1
* PowerPC hypervisor mode is not fundamentally available only for PowerPC 64.j_mayer2007-11-171-8/+11
* Always make all PowerPC exception definitions visible.j_mayer2007-11-171-5/+2Star
* PowerPC 601 need specific callbacks for its BATs setup.j_mayer2007-11-041-5/+14
* Implement power-management for all defined PowerPC CPUs.j_mayer2007-10-261-23/+2Star
* Gprof prooved the PowerPC emulation spent too much time in MSR load and storej_mayer2007-10-251-0/+142