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spice_video_codecs
Experimental fork of QEMU with video encoding patches
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target-ppc
/
helper_regs.h
Commit message (
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Author
Age
Files
Lines
*
ppc: Do some batching of TCG tlb flushes
Benjamin Herrenschmidt
2016-05-30
1
-0
/
+13
*
ppc: Use split I/D mmu modes to avoid flushes on interrupts
Benjamin Herrenschmidt
2016-05-30
1
-7
/
+47
*
PPC: Only enter MSR_POW when no interrupts pending
Alexander Graf
2014-04-08
1
-1
/
+1
*
cputlb: Change tlb_flush() argument to CPUState
Andreas Färber
2014-03-13
1
-1
/
+1
*
PPC: Add VSX to hflags
Alexander Graf
2013-12-20
1
-1
/
+1
*
cpu: Move halted and interrupt_request fields to CPUState
Andreas Färber
2013-03-12
1
-4
/
+7
*
Replace always_inline with inline
Blue Swirl
2009-08-16
1
-5
/
+5
*
Update to a hopefully more future proof FSF address
Blue Swirl
2009-07-16
1
-2
/
+1
*
Update FSF address in GPL/LGPL boilerplate
aurel32
2009-01-04
1
-1
/
+1
*
target-ppc: Convert XER accesses to TCG
aurel32
2008-10-21
1
-18
/
+0
*
ppc: cleanup register types
aurel32
2008-09-04
1
-1
/
+1
*
PowerPC hypervisor mode is not fundamentally available only for PowerPC 64.
j_mayer
2007-11-17
1
-8
/
+11
*
Always make all PowerPC exception definitions visible.
j_mayer
2007-11-17
1
-5
/
+2
*
PowerPC 601 need specific callbacks for its BATs setup.
j_mayer
2007-11-04
1
-5
/
+14
*
Implement power-management for all defined PowerPC CPUs.
j_mayer
2007-10-26
1
-23
/
+2
*
Gprof prooved the PowerPC emulation spent too much time in MSR load and store
j_mayer
2007-10-25
1
-0
/
+142