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path: root/target-ppc/int_helper.c
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* cpu: move exec-all.h inclusion out of cpu.hPaolo Bonzini2016-05-191-0/+1
* ppc: Clean up includesPeter Maydell2016-01-291-0/+1
* target-ppc: fix vcipher, vcipherlast, vncipherlast and vpermxorAurelien Jarno2015-09-201-5/+14
* crypto: move built-in AES implementation into crypto/Daniel P. Berrange2015-07-071-1/+1
* target-ppc: Fix vcmpbfp. Unordered CaseTom Musta2014-11-041-1/+1
* target-ppc: Fix Altivec ShiftsTom Musta2014-11-041-11/+2Star
* target-ppc: simplify AES emulationAurelien Jarno2014-11-041-2/+2
* ppc: fix result of DLMZB when no zero bytes are foundPaolo Bonzini2014-11-041-0/+1
* ppc: use CRF_* in int_helper.cPaolo Bonzini2014-11-041-6/+6
* target-ppc: Implement mulldo with TCGTom Musta2014-09-081-27/+0Star
* target-ppc: Bug Fix: sradTom Musta2014-09-081-1/+1
* target-ppc: Bug Fix: mulldo OV DetectionTom Musta2014-09-081-2/+12
* target-ppc: Refactor AES InstructionsTom Musta2014-06-161-254/+38Star
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-1/+1
* target-ppc: Add missing 'static' and 'const' attributesStefan Weil2014-03-191-1/+1
* misc: Fix typos in commentsStefan Weil2014-03-151-1/+1
* target-ppc: Altivec 2.07: Vector Permute and Exclusive ORTom Musta2014-03-051-0/+14
* target-ppc: Altivec 2.07: Vector SHA Sigma InstructionsTom Musta2014-03-051-0/+82
* target-ppc: Altivec 2.07: AES InstructionsTom Musta2014-03-051-0/+280
* target-ppc: Altivec 2.07: Binary Coded Decimal InstructionsTom Musta2014-03-051-0/+201
* target-ppc: Altivec 2.07: Vector Polynomial Multiply SumTom Musta2014-03-051-0/+70
* target-ppc: Altivec 2.07: Vector Gather Bits by BytesTom Musta2014-03-051-0/+276
* target-ppc: Altivec 2.07: Doubleword ComparesTom Musta2014-03-051-4/+10
* target-ppc: Altivec 2.07: vbpermq InstructionTom Musta2014-03-051-0/+31
* target-ppc: Altivec 2.07: Quadword Addition and SubtracationTom Musta2014-03-051-0/+185
* target-ppc: Altivec 2.07: Vector Doubleword Rotate and Shift InstructionsTom Musta2014-03-051-0/+4
* target-ppc: Altivec 2.07: Change Bit Masks to Support 64-bit Rotates and ShiftsTom Musta2014-03-051-25/+15Star
* target-ppc: Altivec 2.07: Unpack Signed Word InstructionsTom Musta2014-03-051-0/+2
* target-ppc: Altivec 2.07: Pack Doubleword InstructionsTom Musta2014-03-051-0/+4
* target-ppc: Altivec 2.07: Vector Min/Max Doubleword InstructionsTom Musta2014-03-051-0/+2
* target-ppc: Altivec 2.07: Vector Population Count InstructionsTom Musta2014-03-051-0/+14
* target-ppc: Altivec 2.07: Add Vector Count Leading ZeroesTom Musta2014-03-051-0/+29
* target-ppc: Altivec 2.07: vmuluw InstructionTom Musta2014-03-051-0/+1
* target-ppc: Altivec 2.07: Multiply Even/Odd Word InstructionsTom Musta2014-03-051-0/+2
* target-ppc: Altivec 2.07: Change VMUL_DO to Support 64-bit IntegersTom Musta2014-03-051-12/+14
* target-ppc: Altivec 2.07: Add/Subtract Unsigned Doubleword ModuloTom Musta2014-03-051-0/+1
* target-ppc: Add ISA 2.06 divwe[o] InstructionsTom Musta2014-03-051-0/+32
* target-ppc: Add ISA 2.06 divweu[o] InstructionsTom Musta2014-03-051-0/+31
* target-ppc: Add ISA2.06 divde[o] InstructionsTom Musta2014-03-051-0/+23
* target-ppc: Add ISA2.06 divdeu[o] InstructionsTom Musta2014-03-051-0/+27
* target-ppc: Add ISA2.06 bpermd InstructionTom Musta2014-03-051-0/+20
* target-ppc: emulate cmpb instructionAurelien Jarno2013-04-261-0/+15
* target-ppc: Split out SO, OV, CA fields from XERRichard Henderson2013-02-231-23/+15Star
* target-ppc: Use mul*2 in mulh* insnsRichard Henderson2013-02-231-18/+0Star
* misc: move include files to include/qemu/Paolo Bonzini2012-12-191-1/+1
* target-ppc: get rid of the HANDLE_NAN{1, 2, 3} macrosAurelien Jarno2012-10-041-21/+0Star
* target-ppc: use the softfloat float32_muladd functionAurelien Jarno2012-10-041-43/+14Star
* target-ppc: use the softfloat min/max functionsAurelien Jarno2012-10-041-21/+2Star
* target-ppc: simplify NaN propagation for vector functionsAurelien Jarno2012-10-041-19/+7Star
* ppc: Make hbrev table constBlue Swirl2012-06-241-1/+1
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