| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | Move target-* CPU file into a target/ folder | Thomas Huth | 2016-12-20 | 10 | -5628/+0 |
| * | target-ppc: Implement bcdctz. instruction | Jose Ricardo Ziviani | 2016-11-15 | 1 | -0/+7 |
| * | target-ppc: Implement bcdcfz. instruction | Jose Ricardo Ziviani | 2016-11-15 | 1 | -0/+7 |
| * | target-ppc: Implement bcdctn. instruction | Jose Ricardo Ziviani | 2016-11-15 | 1 | -0/+4 |
| * | target-ppc: Implement bcdcfn. instruction | Jose Ricardo Ziviani | 2016-11-15 | 2 | -2/+57 |
| * | target-ppc: add vprtyb[w/d/q] instructions | Ankit Kumar | 2016-11-15 | 2 | -0/+7 |
| * | target-ppc: add vrldnm and vrlwnm instructions | Bharata B Rao | 2016-11-15 | 2 | -2/+8 |
| * | target-ppc: add vrldnmi and vrlwmi instructions | Gautham R. Shenoy | 2016-11-15 | 2 | -2/+8 |
| * | target-ppc: Add xvcmpnesp, xvcmpnedp instructions | Swapnil Bokade | 2016-10-28 | 2 | -0/+4 |
| * | target-ppc: add xscmp[eq,gt,ge,ne]dp instructions | Sandipan Das | 2016-10-28 | 2 | -0/+8 |
| * | target-ppc: add vmul10[u,eu,cu,ecu]q instructions | Vasant Hegde | 2016-10-28 | 2 | -4/+76 |
| * | target-ppc: implement xxbr[qdwh] instruction | Nikunj A Dadhania | 2016-10-28 | 2 | -0/+85 |
| * | target-ppc: implement vnegw/d instructions | Nikunj A Dadhania | 2016-10-28 | 2 | -0/+4 |
| * | target-ppc: implement vexts[bh]2w and vexts[bhw]2d | Nikunj A Dadhania | 2016-10-14 | 2 | -0/+10 |
| * | target-ppc: fix vmx instruction type/type2 | Nikunj A Dadhania | 2016-10-05 | 2 | -24/+24 |
| * | target-ppc: Implement mtvsrws instruction | Ravi Bangoria | 2016-10-05 | 2 | -0/+20 |
| * | target-ppc: add vclzlsbb/vctzlsbb instructions | Rajalakshmi Srinivasaraghavan | 2016-10-05 | 2 | -0/+16 |
| * | target-ppc: add vector compare not equal instructions | Rajalakshmi Srinivasaraghavan | 2016-10-05 | 2 | -4/+13 |
| * | target-ppc: add stxvb16x instruction | Nikunj A Dadhania | 2016-10-05 | 2 | -0/+20 |
| * | target-ppc: add lxvb16x instruction | Nikunj A Dadhania | 2016-10-05 | 2 | -0/+20 |
| * | target-ppc: add stxvh8x instruction | Nikunj A Dadhania | 2016-10-05 | 2 | -0/+32 |
| * | target-ppc: add lxvh8x instruction | Nikunj A Dadhania | 2016-10-05 | 2 | -0/+50 |
| * | target-ppc: improve stxvw4x implementation | Nikunj A Dadhania | 2016-10-05 | 1 | -14/+19 |
| * | target-ppc: improve lxvw4x implementation | Nikunj A Dadhania | 2016-10-05 | 1 | -14/+18 |
| * | target-ppc: Implement mtvsrdd instruction | Ravi Bangoria | 2016-10-05 | 2 | -0/+24 |
| * | target-ppc: Implement mfvsrld instruction | Ravi Bangoria | 2016-10-05 | 2 | -0/+18 |
| * | target-ppc: add stxsi[bh]x instruction | Nikunj A Dadhania | 2016-09-23 | 2 | -0/+5 |
| * | target-ppc: add lxsi[bw]zx instruction | Nikunj A Dadhania | 2016-09-23 | 2 | -0/+4 |
| * | target-ppc: add xxspltib instruction | Nikunj A Dadhania | 2016-09-23 | 2 | -0/+25 |
| * | target-ppc: convert st64 to use new macro | Nikunj A Dadhania | 2016-09-23 | 5 | -32/+32 |
| * | target-ppc: convert ld64 to use new macro | Nikunj A Dadhania | 2016-09-23 | 4 | -32/+32 |
| * | target-ppc: add vector permute right indexed instruction | Rajalakshmi Srinivasaraghavan | 2016-09-23 | 2 | -0/+19 |
| * | target-ppc: add vector bit permute doubleword instruction | Rajalakshmi Srinivasaraghavan | 2016-09-23 | 2 | -0/+2 |
| * | target-ppc: add vector count trailing zeros instructions | Rajalakshmi Srinivasaraghavan | 2016-09-23 | 2 | -0/+27 |
| * | target-ppc: add vector extract instructions | Rajalakshmi Srinivasaraghavan | 2016-09-23 | 2 | -3/+17 |
| * | target-ppc: add vector insert instructions | Rajalakshmi Srinivasaraghavan | 2016-09-23 | 2 | -5/+45 |
| * | ppc: Rename #include'd .c files to .inc.c | Benjamin Herrenschmidt | 2016-09-07 | 10 | -0/+0 |
| * | target-ppc: add vsrv instruction | Vivek Andrew Sha | 2016-09-07 | 2 | -0/+2 |
| * | target-ppc: add vslv instruction | Vivek Andrew Sha | 2016-09-07 | 2 | -0/+5 |
| * | target-ppc: add vcmpnez[b,h,w][.] instructions | Swapnil Bokade | 2016-09-07 | 2 | -0/+12 |
| * | target-ppc: add vabsdu[b,h,w] instructions | Sandipan Das | 2016-09-07 | 2 | -3/+12 |
| * | target-ppc: add dtstsfi[q] instructions | Sandipan Das | 2016-09-07 | 2 | -0/+34 |
| * | ppc: Don't update the NIP in floating point generated code | Benjamin Herrenschmidt | 2016-09-07 | 2 | -34/+0 |
| * | ppc: Move VSX ops out of translate.c | Benjamin Herrenschmidt | 2016-09-07 | 2 | -0/+991 |
| * | ppc: Move VMX ops out of translate.c | Benjamin Herrenschmidt | 2016-09-07 | 2 | -0/+1074 |
| * | ppc: Move DFP ops out of translate.c | Benjamin Herrenschmidt | 2016-09-07 | 2 | -0/+363 |
| * | ppc: Move embedded spe ops out of translate.c | Benjamin Herrenschmidt | 2016-09-07 | 2 | -0/+1334 |
| * | ppc: Move classic fp ops out of translate.c | Benjamin Herrenschmidt | 2016-09-07 | 2 | -0/+1209 |
