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* ppc: LPCR is a HV resourceBenjamin Herrenschmidt2016-07-011-4/+5
* ppc: Initial HDEC supportBenjamin Herrenschmidt2016-07-014-10/+54
* ppc: Enforce setting MSR:EE,IR and DR when MSR:PR is setBenjamin Herrenschmidt2016-07-011-0/+4
* ppc: Fix conditions for delivering external interrupts to a guestBenjamin Herrenschmidt2016-07-011-11/+8Star
* ppc: Use a helper to filter writes to LPCRBenjamin Herrenschmidt2016-07-013-19/+95
* ppc: Update LPCR definitionsBenjamin Herrenschmidt2016-07-011-3/+13
* ppc: Add a bunch of hypervisor SPRs to Book3sBenjamin Herrenschmidt2016-07-011-3/+116
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2016-06-291-2/+0Star
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| * target-*: Don't redefine cpu_exec()Peter Crosthwaite2016-06-291-2/+0Star
* | softfloat: Implement run-time-configurable meaning of signaling NaN bitAleksandar Markovic2016-06-241-59/+61
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* ppc: Disable huge page support if it is not available for main RAMThomas Huth2016-06-231-1/+16
* ppc: Add P7/P8 Power Management instructionsBenjamin Herrenschmidt2016-06-236-3/+241
* ppc: Move exception generation code out of lineBenjamin Herrenschmidt2016-06-231-3/+3
* ppc: Turn a bunch of booleans from int to boolBenjamin Herrenschmidt2016-06-231-19/+18Star
* ppc: Add real mode CI load/store instructions for P7 and P8Benjamin Herrenschmidt2016-06-233-14/+55
* ppc: Rework generation of priv and inval interruptsBenjamin Herrenschmidt2016-06-232-399/+310Star
* ppc: Fix generation if ISI/DSI vs. HV modeBenjamin Herrenschmidt2016-06-231-19/+50
* ppc: Fix POWER7 and POWER8 exception definitionsBenjamin Herrenschmidt2016-06-232-7/+31
* ppc: fix exception model for HV modeBenjamin Herrenschmidt2016-06-231-89/+45Star
* ppc: define a default LPCR valueBenjamin Herrenschmidt2016-06-231-0/+14
* ppc: Fix rfi/rfid/hrfi/... emulationBenjamin Herrenschmidt2016-06-232-31/+24Star
* ppc: Improve emulation of THRM registersBenjamin Herrenschmidt2016-06-223-3/+54
* target-ppc: Fix rlwimi, rlwinm, rlwnm againRichard Henderson2016-06-221-3/+1Star
* ppc64: disable gen_pause() for linux-user modeLaurent Vivier2016-06-221-1/+3
* trace: split out trace events for target-ppc/ directoryDaniel P. Berrange2016-06-201-0/+5
* exec: [tcg] Track which vCPU is performing translation and executionLluís Vilanova2016-06-201-0/+1
* spapr: Abstract CPU core device and type specific core devicesBharata B Rao2016-06-171-0/+28
* target-ppc: Fix rlwimi, rlwinm, rlwnmRichard Henderson2016-06-171-21/+52
* target-ppc: Bug in BookE wait instructionJakub Horak2016-06-171-1/+1
* os-posix: include sys/mman.hPaolo Bonzini2016-06-161-1/+0Star
* ppc: Add PowerISA 2.07 compatibility modeThomas Huth2016-06-141-0/+3
* ppc: Improve PCR bit selection in ppc_set_compat()Thomas Huth2016-06-142-4/+13
* ppc: Provide function to get CPU class of the host CPUThomas Huth2016-06-142-5/+21
* ppc: Split pcr_mask settings into supported bits and the register maskThomas Huth2016-06-143-3/+7
* Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell2016-06-071-2/+0Star
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| * virtio: move bi-endian target support to a single locationGreg Kurz2016-06-071-2/+0Star
* | ppc: Do not take exceptions on unknown SPRs in privileged modeBenjamin Herrenschmidt2016-06-071-2/+9
* | ppc: Add missing slbfee. instruction on ppc64 BookS processorsBenjamin Herrenschmidt2016-06-073-0/+57
* | ppc: Fix slbia decodeBenjamin Herrenschmidt2016-06-071-1/+1
* | ppc: Fix mtmsr decodingBenjamin Herrenschmidt2016-06-071-1/+1
* | ppc: POWER7 has lq/stq instructions and stq need to check ISABenjamin Herrenschmidt2016-06-072-2/+5
* | ppc: POWER7 had ACOP and PID registersBenjamin Herrenschmidt2016-06-071-0/+18
* | ppc: Batch TLB flushes on 32-bit 6xx/7xx/7xxx in hash modeBenjamin Herrenschmidt2016-06-074-44/+31Star
* | ppc: Fix tlb invalidations on 6xx/7xx/7xxx 32-bit processorsBenjamin Herrenschmidt2016-06-071-0/+8
* | ppc: Properly tag the translation cache based on MMU modeBenjamin Herrenschmidt2016-06-071-1/+1
* | target-ppc: fixup bitrot in mmu_helper.c debug statementsMark Cave-Ayland2016-06-071-14/+24
* | ppc: fix hrfid, tlbia and slbia privilegeCédric Le Goater2016-06-071-3/+3
* | ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HVBenjamin Herrenschmidt2016-06-072-4/+8
* | ppc: Better figure out if processor has HV modeBenjamin Herrenschmidt2016-06-073-5/+22
* | target-ppc/fpu_helper: Fix efscmp* instructions handlingTalha Imran2016-06-071-1/+1
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