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path: root/target-sparc/cpu.h
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* sparc64 really implement itlb/dtlb automatic replacement writesIgor Kovalenko2009-07-271-0/+11
* sparc64 name mmu registers and general cleanupIgor Kovalenko2009-07-271-6/+32
* sparc64: trap handling correctionsIgor Kovalenko2009-07-121-6/+34
* Hardware convenience libraryPaul Brook2009-05-191-2/+0Star
* Use dynamical computation for condition codesBlue Swirl2009-05-101-0/+24
* The _exit syscall is used for both thread termination in NPTL applications,pbrook2009-03-071-1/+2
* Add SuperSPARC MMU breakpoint registers (Robert Reif)blueswir12008-12-231-0/+1
* Better SuperSPARC emulation (Robert Reif)blueswir12008-12-231-0/+1
* Implement tick interrupt disable bitsblueswir12008-12-231-1/+2
* Refactor translation block CPU state handling (Jan Kiszka)aliguori2008-11-181-0/+16
* Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori2008-11-181-5/+7
* Show size for unassigned accesses (Robert Reif)blueswir12008-10-061-1/+1
* Rearrange tick functionsblueswir12008-10-031-0/+7
* Fix missing prototype warnings by moving declarationsblueswir12008-10-031-0/+9
* Add software and timer interrupt supportblueswir12008-09-221-0/+2
* Move signal handler prototype back to cpu.hblueswir12008-09-201-0/+1
* Convert rest of ops using float32 to TCG, remove FT0 and FT1blueswir12008-09-101-1/+0Star
* Implement ldxfsr/stxfsr, fix ld(x)fsr masks, convert to TCGblueswir12008-09-091-16/+5Star
* Silence gcc warning about constant overflowblueswir12008-09-061-1/+9
* Fix FCC handling for Sparc64 target, initial patch by Vince Weaverblueswir12008-08-291-26/+26
* Fix Sparc64 boot on i386 host:blueswir12008-08-291-6/+32
* Use initial CPU definition structure for some CPU fields instead of copyingblueswir12008-08-211-39/+49
* Make MAXTL dynamic, bounds check tl when indexingblueswir12008-07-251-3/+5
* Sparc32: save/load all MMU registers, Sparc64: add CPU save/loadblueswir12008-07-241-1/+1
* Use MMU globals for some MMU trapsblueswir12008-07-211-1/+2
* Make UA200x features selectable, add MMU typesblueswir12008-07-201-0/+10
* Fix MMU miss trapsblueswir12008-07-161-2/+2
* Move interrupt_request and user_mode_only to common cpu state.pbrook2008-07-011-2/+0Star
* Move CPU save/load registration to common code.pbrook2008-06-301-0/+2
* Add instruction counter.pbrook2008-06-291-0/+5
* Fix compiler warning (Jan Kiszka)blueswir12008-06-231-1/+2
* Allow NWINDOWS selection (CPU feature with model specific defaults)blueswir12008-06-071-6/+27
* Fix typo.pbrook2008-05-301-1/+1
* Move clone() register setup to target specific code. Handle fork-like clone.pbrook2008-05-301-0/+12
* MicroSparc I didn't have fsmuld opblueswir12008-05-291-2/+3
* Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard2008-05-291-2/+0Star
* moved halted field to CPU_COMMONbellard2008-05-281-1/+0Star
* Wrap long linesblueswir12008-05-121-1/+1
* Remove duplicated fieldblueswir12008-05-101-1/+0Star
* suppressed fixed registersbellard2008-05-101-2/+5
* Fix compiler warningsblueswir12008-05-101-7/+7
* CPU feature selection supportblueswir12008-05-091-3/+27
* Complete the TCG conversionblueswir12008-05-041-4/+2Star
* Document the shift valuesblueswir12008-04-231-6/+12
* Move CPU stuff unrelated to translation to helper.cblueswir12008-03-291-0/+1
* Convert mulscc to TCG, add cc_src2blueswir12008-03-161-1/+1
* Convert condition code changing versions of add, sub, logic, and div to TCGblueswir12008-03-131-0/+5
* Convert exception ops to TCGblueswir12008-03-061-1/+0Star
* Convert Sparc64 trap state ops to TCGblueswir12008-03-051-4/+8
* Convert tick operations to TCGblueswir12008-03-021-3/+0Star
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