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path: root/target-sparc/machine.c
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* cputlb: Change tlb_flush() argument to CPUStateAndreas Färber2014-03-131-1/+2
* misc: move include files to include/qemu/Paolo Bonzini2012-12-191-1/+1
* target-sparc: Don't overuse CPUStateAndreas Färber2012-03-141-2/+2
* target-sparc: Change fpr representation to doubles.Richard Henderson2011-10-261-14/+6Star
* Remove exec-all.h include directivesBlue Swirl2011-06-261-1/+1
* Sparc32: dummy implementation of MXCC MMU breakpoint registersBlue Swirl2011-06-261-0/+26
* sparc: Fix lazy flag calculation on interrupts, refactorBlue Swirl2010-05-091-2/+2
* sparc64: reimplement tick timers v4Igor V. Kovalenko2010-01-271-7/+7
* Sparc64: replace tsptr with helper routineIgor Kovalenko2009-08-041-1/+0Star
* sparc64 name mmu registers and general cleanupIgor Kovalenko2009-07-271-8/+8
* Convert machine registration to use module init functionsAnthony Liguori2009-05-211-22/+0Star
* Remove unnecessary trailing newlinesblueswir12008-12-131-2/+0Star
* Add a generic Niagara machineblueswir12008-09-261-0/+1
* Handle wrapped registers correctly when savingblueswir12008-08-011-1/+11
* Make MAXTL dynamic, bounds check tl when indexingblueswir12008-07-251-5/+5
* Sparc32: save/load all MMU registers, Sparc64: add CPU save/loadblueswir12008-07-241-3/+109
* Add T1 and T2 CPUs, add a Sun4v machineblueswir12008-07-221-0/+1
* Allow NWINDOWS selection (CPU feature with model specific defaults)blueswir12008-06-071-2/+6
* remove target ifdefs from vl.caurel322008-05-041-0/+102
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