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* target-tilegx: Handle unconditional jump instructionsRichard Henderson2015-09-151-17/+41
* target-tilegx: Handle post-increment load and store instructionsRichard Henderson2015-09-151-8/+86
* target-tilegx: Handle basic load and store instructionsRichard Henderson2015-09-151-15/+115
* target-tilegx: Handle most bit manipulation instructionsRichard Henderson2015-09-153-1/+79
* target-tilegx: Handle arithmetic instructionsRichard Henderson2015-09-151-6/+90
* target-tilegx: Handle simple logical operationsRichard Henderson2015-09-151-3/+96
* target-tilegx: Add TILE-Gx building filesChen Gang2015-09-151-0/+1
* target-tilegx: Generate SEGV properlyRichard Henderson2015-09-152-1/+6
* target-tilegx: Framework for decoding bundlesRichard Henderson2015-09-151-0/+1145
* target-tilegx: Add several helpers for instructions translationChen Gang2015-09-152-0/+74
* target-tilegx: Add cpu basic features for linux-userChen Gang2015-09-152-0/+345
* target-tilegx: Add special register information from Tilera CorporationChen Gang2015-09-151-0/+216
* target-tilegx: Fix LDNA_ADD_IMM8_OPCODE_X1Richard Henderson2015-09-151-1/+1
* target-tilegx: Modify _SPECIAL_ opcodesRichard Henderson2015-09-151-2/+2
* target-tilegx: Modify opcode_tilegx.h to fit QEMU usageChen Gang2015-09-151-110/+110
* target-tilegx: Add opcode basic implementation from Tilera CorporationChen Gang2015-09-151-0/+1406