summaryrefslogtreecommitdiffstats
path: root/target-tricore
Commit message (Expand)AuthorAgeFilesLines
* target-*: dfilter support for in_asmRichard Henderson2016-06-051-1/+2
* cpu: move exec-all.h inclusion out of cpu.hPaolo Bonzini2016-05-195-2/+4
* target-tricore: make cpu-qom.h not target specificPaolo Bonzini2016-05-192-28/+30
* Fix some typos found by codespellStefan Weil2016-05-181-1/+1
* tcg: Allow goto_tb to any target PC in user modeSergey Fedorov2016-05-131-5/+15
* tb: consistently use uint32_t for tb->flagsEmilio G. Cota2016-05-131-1/+1
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2016-03-241-0/+1
|\
| * include/qemu/osdep.h: Don't include qapi/error.hMarkus Armbruster2016-03-221-0/+1
* | target-tricore: Add ftoi and itof instructionsBastian Koppelmann2016-03-233-0/+42
* | target-tricore: Add cmp.f instructionBastian Koppelmann2016-03-233-0/+27
* | target-tricore: Add div.f instructionBastian Koppelmann2016-03-233-0/+30
* | target-tricore: Add mul.f instructionBastian Koppelmann2016-03-233-0/+30
* | target-tricore: add add.f/sub.f instructionsBastian Koppelmann2016-03-233-1/+36
* | target-tricore: Move general CHECK_REG_PAIR of decode_rrr_divideBastian Koppelmann2016-03-231-2/+8
* | target-tricore: Add FPU infrastructureBastian Koppelmann2016-03-236-3/+115
* | target-tricore: Fix psw_read() clearing too many bitsBastian Koppelmann2016-03-231-1/+1
* | target-tricore: Fix helper_msub64_q_ssov not reseting OVF bitBastian Koppelmann2016-03-231-0/+2
* | target-tricore: add missing break in insn decode switch stmtBastian Koppelmann2016-03-231-0/+2
|/
* tcg: Add type for vCPU pointersLluís Vilanova2016-03-011-1/+1
* target-tricore: add opd trap generationBastian Koppelmann2016-02-251-8/+277
* target-tricore: add illegal opcode trap generationBastian Koppelmann2016-02-251-19/+156
* target-tricore: add context managment trap generationBastian Koppelmann2016-02-251-3/+30
* target-tricore: Add trap handling & SOVF/OVF trapsBastian Koppelmann2016-02-254-2/+147
* target-tricore: Fix wrong precedences on psw_writeBastian Koppelmann2016-02-251-4/+4
* target-tricore: fix save_context_upper using env->PSWBastian Koppelmann2016-02-251-1/+1
* all: Clean up includesPeter Maydell2016-02-231-1/+0Star
* tcg: Change tcg_global_mem_new_* to take a TCGv_ptrRichard Henderson2016-02-091-11/+11
* log: do not unnecessarily include qom/cpu.hPaolo Bonzini2016-02-031-0/+1
* tricore: Clean up includesPeter Maydell2016-01-294-6/+4Star
* tricore: avoid "naked" qemu_logPaolo Bonzini2015-12-171-2/+2
* qdev: Protect device-list-properties against broken devicesMarkus Armbruster2015-10-091-0/+6
* tcg: Remove gen_intermediate_code_pcRichard Henderson2015-10-071-26/+5Star
* tcg: Pass data argument to restore_state_to_opcRichard Henderson2015-10-071-2/+3
* tcg: Add TCG_MAX_INSNSRichard Henderson2015-10-071-7/+13
* target-*: Increment num_insns immediately after tcg_gen_insn_startRichard Henderson2015-10-071-2/+1Star
* target-*: Unconditionally emit tcg_gen_insn_startRichard Henderson2015-10-071-0/+2
* tricore: Remove ELF_MACHINE from cpu.hPeter Crosthwaite2015-09-251-2/+0Star
* tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt2015-09-112-2/+2
* maint: remove unused include for signal.hDaniel P. Berrange2015-09-111-1/+0Star
* tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson2015-08-241-10/+10
* tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32Richard Henderson2015-08-241-6/+6
* cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite2015-07-091-1/+1
* cpu: Change cpu_exec_init() arg to cpu, not envPeter Crosthwaite2015-07-091-1/+1
* cpu: Add Error argument to cpu_exec_init()Bharata B Rao2015-07-091-1/+1
* target-tricore: fix depositing bits from PCXI into ICRPaolo Bonzini2015-06-291-2/+2
* disas: Remove uses of CPU envPeter Crosthwaite2015-06-221-1/+1
* target-tricore: fix BOL_ST_H_LONGOFF using ldBastian Koppelmann2015-05-301-1/+1
* target-tricore: fix msub32_q producing the wrong overflow bitBastian Koppelmann2015-05-301-11/+0Star
* target-tricore: fix OPC2_32_RR_DVINIT_HU having write before use on the resultBastian Koppelmann2015-05-301-1/+1
* target-tricore: add RR_DIV and RR_DIV_U instructions of the v1.6 ISABastian Koppelmann2015-05-224-0/+74
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-11-06 10:20:28 +0100