bwlp/qemu.git - Experimental fork of QEMU with video encoding patches

	Commit message (Expand)	Author	Age	Files	Lines
*	target-xtensa: raise an exception for invalid and reserved opcodes	Max Filippov	2011-11-02	1	-1/+6
*	target-xtensa: mask out undefined bits of WINDOWSTART SR	Max Filippov	2011-11-02	1	-1/+1
*	target-xtensa: increase xtensa options accuracy	Max Filippov	2011-10-16	1	-7/+7
*	target-xtensa: implement MAC16 option	Max Filippov	2011-10-15	1	-1/+134
*	target-xtensa: implement boolean option	Max Filippov	2011-09-10	1	-24/+85
*	target-xtensa: implement memory protection options	Max Filippov	2011-09-10	1	-5/+86
*	target-xtensa: implement relocatable vectors	Max Filippov	2011-09-10	1	-0/+1
*	target-xtensa: implement CPENABLE and PRID SRs	Max Filippov	2011-09-10	1	-0/+7
*	target-xtensa: implement accurate window check	Max Filippov	2011-09-10	1	-0/+110
*	target-xtensa: implement interrupt option	Max Filippov	2011-09-10	1	-10/+143
*	target-xtensa: implement SIMCALL	Max Filippov	2011-09-10	1	-1/+8
*	target-xtensa: implement unaligned exception option	Max Filippov	2011-09-10	1	-3/+44
*	target-xtensa: implement extended L32R	Max Filippov	2011-09-10	1	-4/+33
*	target-xtensa: implement loop option	Max Filippov	2011-09-10	1	-9/+68
*	target-xtensa: implement windowed registers	Max Filippov	2011-09-10	1	-9/+136
*	target-xtensa: implement RST2 group (32 bit mul/div/rem)	Max Filippov	2011-09-10	1	-1/+76
*	target-xtensa: implement exceptions	Max Filippov	2011-09-10	1	-5/+102
*	target-xtensa: add PS register and access control	Max Filippov	2011-09-10	1	-5/+24
*	target-xtensa: implement CACHE group	Max Filippov	2011-09-10	1	-1/+94
*	target-xtensa: implement SYNC group	Max Filippov	2011-09-10	1	-1/+30
*	target-xtensa: mark reserved and TBD opcodes	Max Filippov	2011-09-10	1	-1/+109
*	target-xtensa: implement LSAI group	Max Filippov	2011-09-10	1	-0/+89
*	target-xtensa: implement shifts (ST1 and RST1 groups)	Max Filippov	2011-09-10	1	-0/+242
*	target-xtensa: implement RST3 group	Max Filippov	2011-09-10	1	-0/+161
*	target-xtensa: add special and user registers	Max Filippov	2011-09-10	1	-2/+47
*	target-xtensa: implement JX/RET0/CALLX	Max Filippov	2011-09-10	1	-0/+43
*	target-xtensa: implement conditional jumps	Max Filippov	2011-09-10	1	-0/+164
*	target-xtensa: implement RT0 group	Max Filippov	2011-09-10	1	-0/+19
*	target-xtensa: implement narrow instructions	Max Filippov	2011-09-10	1	-0/+54
*	target-xtensa: implement disas_xtensa_insn	Max Filippov	2011-09-10	1	-0/+452
*	target-xtensa: add target stubs	Max Filippov	2011-09-10	1	-0/+68