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* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-052-1/+2
* softmmu: commonize helper definitionsPaolo Bonzini2014-06-051-14/+1Star
* softmmu: move ALIGNED_ONLY to cpu.hPaolo Bonzini2014-06-052-1/+1
* softmmu: make do_unaligned_access a method of CPUPaolo Bonzini2014-06-053-6/+7
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-284-9/+4Star
* target-xtensa: fix cross-page jumps/calls at the end of TBMax Filippov2014-05-261-2/+2
* cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber2014-03-131-4/+4
* cputlb: Change tlb_flush() argument to CPUStateAndreas Färber2014-03-131-1/+3
* cputlb: Change tlb_flush_page() argument to CPUStateAndreas Färber2014-03-131-4/+6
* cpu-exec: Change cpu_resume_from_signal() argument to CPUStateAndreas Färber2014-03-131-1/+1
* exec: Change cpu_watchpoint_{insert,remove{,_by_ref,_all}} argumentAndreas Färber2014-03-131-3/+6
* translate-all: Change cpu_restore_state() argument to CPUStateAndreas Färber2014-03-131-2/+4
* cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber2014-03-131-2/+2
* exec: Change tlb_fill() argument to CPUStateAndreas Färber2014-03-131-2/+4
* cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-2/+3
* cpu: Move watchpoint fields from CPU_COMMON to CPUStateAndreas Färber2014-03-132-4/+6
* cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber2014-03-132-10/+14
* cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber2014-03-132-7/+8
* target-xtensa: Clean up ENV_GET_CPU() usageAndreas Färber2014-03-132-2/+4
* target-xtensa: provide HW confg ID registersMax Filippov2014-02-244-3/+21
* target-xtensa: refactor standard core configurationMax Filippov2014-02-244-21/+13Star
* target-xtensa: add basic checks to icache opcodesMax Filippov2014-02-243-0/+33
* target-xtensa: add basic checks to dcache opcodesMax Filippov2014-02-241-0/+38
* target-xtensa: add RRRI4 opcode format fieldsMax Filippov2014-02-241-0/+9
* exec: Make ldl_*_phys input an AddressSpaceEdgar E. Iglesias2014-02-111-1/+2
* exec: Make tb_invalidate_phys_addr input an ASEdgar E. Iglesias2014-02-111-1/+2
* target-xtensa: add missing DEBUG section to dc233c configMax Filippov2013-11-081-0/+1
* target-xtensa: add in_asm loggingMax Filippov2013-10-151-0/+8
* tcg: Move helper registration into tcg_context_initRichard Henderson2013-10-101-2/+0Star
* target: Include softmmu_exec.h where forgottenRichard Henderson2013-09-021-0/+1
* tcg: Change tcg_gen_exit_tb argument to uintptr_tRichard Henderson2013-09-021-1/+1
* aio / timers: Switch entire codebase to the new timer APIAlex Bligh2013-08-221-1/+1
* Merge remote-tracking branch 'filippov/tags/20130729-xtensa' into stagingAnthony Liguori2013-08-053-23/+53
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| * target-xtensa: check register window inlineMax Filippov2013-07-291-8/+25
| * target-xtensa: don't generate dead code to access invalid SRsMax Filippov2013-07-291-13/+18
| * target-xtensa: avoid double-stopping at breakpointsMax Filippov2013-07-293-2/+8
| * target-xtensa: add fallthrough markersMax Filippov2013-07-291-0/+2
* | cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"Andreas Färber2013-07-291-0/+2
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* cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber2013-07-274-2/+14
* gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functionsAndreas Färber2013-07-271-6/+8
* target-xtensa: Move cpu_gdb_{read,write}_register()Andreas Färber2013-07-271-0/+100
* cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regsAndreas Färber2013-07-262-0/+11
* target-xtensa: Introduce XtensaCPU subclassesAndreas Färber2013-07-263-12/+47
* exec: Change cpu_memory_rw_debug() argument to CPUStateAndreas Färber2013-07-231-5/+5
* cpu: Turn cpu_get_phys_page_debug() into a CPUClass hookAndreas Färber2013-07-234-5/+10
* cpu: Move singlestep_enabled field from CPU_COMMON to CPUStateAndreas Färber2013-07-231-3/+4
* cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber2013-07-231-5/+0Star
* cpu: Introduce CPUClass::set_pc() for gdb_set_cpu_pc()Andreas Färber2013-07-231-0/+8
* target-xtensa: Change gen_intermediate_code_internal() arg to XtensaCPUAndreas Färber2013-07-091-4/+5
* target-xtensa: gen_intermediate_code_internal() should be inlinedAndreas Färber2013-07-091-2/+3
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