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path: root/target/arm/cpu.c
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* target/arm/cpu: Update coding style to make checkpatch.pl happyPhilippe Mathieu-Daudé2020-04-301-3/+6
* target/arm: Make cpu_register() available for other filesThomas Huth2020-04-301-8/+2Star
* Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell2020-03-191-4/+4
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| * cpu: Use DeviceClass reset instead of a special CPUClass resetPeter Maydell2020-03-181-4/+4
* | Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-and-gdbstub-1...Peter Maydell2020-03-181-3/+4
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| * target/arm: default SVE length to 64 bytes for linux-userAlex Bennée2020-03-171-3/+4
* | qom/object: Use common get/set uint helpersFelipe Franciosi2020-03-161-19/+3Star
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* target/arm: Remove EL2 and EL3 setup from user-onlyRichard Henderson2020-03-051-6/+0Star
* target/arm: Disable has_el2 and has_el3 for user-onlyRichard Henderson2020-03-051-2/+4
* target/arm: Implement (trivially) ARMv8.2-TTCNPPeter Maydell2020-03-051-0/+1
* target/arm: Remove ARM_FEATURE_VFP*Richard Henderson2020-02-281-25/+0Star
* target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmacRichard Henderson2020-02-281-1/+5
* target/arm: Add isar_feature_aa64_fp_simd, isar_feature_aa32_vfpRichard Henderson2020-02-281-3/+6
* target/arm: Add isar_feature_aa32_vfp_simdRichard Henderson2020-02-281-2/+2
* target/arm: Set MVFR0.FPSP for ARMv5 cpusRichard Henderson2020-02-211-4/+6
* target/arm: Use isar_feature_aa32_simd_r32 more placesRichard Henderson2020-02-211-5/+4Star
* target/arm: Correctly implement ACTLR2, HACTLR2Peter Maydell2020-02-211-0/+1
* target/arm: Test correct register in aa32_pan and aa32_ats1e1 checksPeter Maydell2020-02-211-52/+52
* target/arm: Move DBGDIDR into ARMISARegistersPeter Maydell2020-02-211-4/+4
* target/arm: Add _aa64_ and _any_ versions of pmu_8_1 isar checksPeter Maydell2020-02-211-1/+2
* target/arm: Define an aa32_pmu_8_1 isar feature test functionPeter Maydell2020-02-211-14/+14
* target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON fieldPeter Maydell2020-02-211-1/+1
* target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1Peter Maydell2020-02-211-1/+1
* target/arm: Add _aa32_ to isar_feature functions testing 32-bit ID registersPeter Maydell2020-02-211-2/+4
* target/arm: Enable ARMv8.2-ATS1E1 in -cpu maxRichard Henderson2020-02-131-0/+4
* target/arm: Raise only one interrupt in arm_cpu_exec_interruptRichard Henderson2020-02-071-18/+12Star
* target/arm: Use bool for unmasked in arm_excp_unmaskedRichard Henderson2020-02-071-3/+3
* target/arm: Pass more cpu state to arm_excp_unmaskedRichard Henderson2020-02-071-10/+12
* target/arm: Move arm_excp_unmasked to cpu.cRichard Henderson2020-02-071-0/+119
* target/arm: Add the hypervisor virtual counterRichard Henderson2020-02-071-1/+2
* target/arm/cpu: Add the kvm-no-adjvtime CPU propertyAndrew Jones2020-01-301-0/+2
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2020-01-271-27/+14Star
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| * qdev: set properties with device_class_set_props()Marc-André Lureau2020-01-241-1/+1
| * qdev: remove extraneous errorMarc-André Lureau2020-01-241-24/+12Star
| * cpu: Use cpu_class_set_parent_reset()Greg Kurz2020-01-241-2/+1Star
* | target/arm: add PMU feature to cortex-r5 and cortex-r5fClement Deschamps2020-01-231-0/+1
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* target/arm: Prepare generic timer for per-platform CNTFRQAndrew Jeffery2019-12-201-10/+51
* target/arm: Abstract the generic timer frequencyAndrew Jeffery2019-12-201-0/+8
* target/arm: Add support for cortex-m7 CPUChristophe Lyon2019-12-161-0/+33
* target/arm/kvm: host cpu: Add support for sve<N> propertiesAndrew Jones2019-11-011-0/+3
* target/arm/cpu64: max cpu: Introduce sve<N> propertiesAndrew Jones2019-11-011-0/+19
* target/arm: Allow SVE to be disabled via a CPU propertyAndrew Jones2019-11-011-1/+2
* target/arm: Rebuild hflags at EL changesRichard Henderson2019-10-241-0/+1
* intc/arm_gic: Support IRQ injection for more than 256 vpusEric Auger2019-10-151-6/+4Star
* target/arm/cpu: Ensure we can use the pmu with kvmAndrew Jones2019-08-161-5/+25
* target/arm: Avoid bogus NSACR traps on M-profile without Security ExtensionPeter Maydell2019-08-021-0/+8
* target/arm: Limit ID register assertions to TCGPeter Maydell2019-07-221-2/+5
* target/arm: Set VFP-related MVFR0 fields for arm926 and arm1026Peter Maydell2019-07-151-0/+12
* target/arm: report ARMv8-A FP support for AArch32 -cpu maxAlex Bennée2019-07-151-0/+4
* hw/arm: Replace global smp variables with machine smp propertiesLike Xu2019-07-051-1/+7