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path: root/target/arm/cpu.c
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* target/arm: Restrict v7A TCG cpus to TCG accelPhilippe Mathieu-Daudé2021-03-081-335/+0Star
* target/arm/cpu: Update coding style to make checkpatch.pl happyPhilippe Mathieu-Daudé2021-03-051-4/+8
* target/arm: Restrict v8M IDAU to TCGPhilippe Mathieu-Daudé2021-03-051-7/+0Star
* target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPURebecca Cran2021-03-051-0/+4
* target/arm: Enable MTE for user-onlyRichard Henderson2021-02-161-0/+15
* target/arm: Use the proper TBI settings for linux-userRichard Henderson2021-02-161-7/+3Star
* target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPURebecca Cran2021-02-111-0/+4
* cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana2021-02-051-15/+26
* cpu: move debug_check_watchpoint to tcg_opsClaudio Fontana2021-02-051-2/+2
* cpu: move adjust_watchpoint_address to tcg_opsClaudio Fontana2021-02-051-1/+1
* cpu: move do_unaligned_access to tcg_opsClaudio Fontana2021-02-051-1/+1
* cpu: move cc->transaction_failed to tcg_opsClaudio Fontana2021-02-051-2/+2
* cpu: move cc->do_interrupt to tcg_opsClaudio Fontana2021-02-051-2/+2
* cpu: Move debug_excp_handler to tcg_opsEduardo Habkost2021-02-051-1/+1
* cpu: Move tlb_fill to tcg_opsEduardo Habkost2021-02-051-1/+1
* cpu: Move cpu_exec_* to tcg_opsEduardo Habkost2021-02-051-1/+1
* cpu: Move synchronize_from_tb() to tcg_opsEduardo Habkost2021-02-051-1/+3
* cpu: Introduce TCGCpuOperations structEduardo Habkost2021-02-051-1/+1
* target/arm: Implement SCR_EL2.EEL2Rémi Denis-Courmont2021-01-191-1/+1
* target/arm: remove redundant testsRémi Denis-Courmont2021-01-191-4/+4
* target/arm: Add cpu properties to control pauthRichard Henderson2021-01-191-0/+13
* target/arm: Remove timer_del()/timer_deinit() before timer_free()Peter Maydell2021-01-081-2/+0Star
* tcg: Make tb arg to synchronize_from_tb constRichard Henderson2021-01-071-1/+2
* hw/intc/armv7m_nvic: Update FPDSCR masking for v8.1MPeter Maydell2020-12-101-0/+3
* target/arm: Don't clobber ID_PFR1.Security on M-profile coresPeter Maydell2020-12-101-1/+1
* target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extensionPeter Maydell2020-10-201-0/+9
* target/arm: Fix has_vfp/has_neon ID reg squashing for M-profilePeter Maydell2020-10-201-12/+19
* hw/arm/virt: Implement kvm-steal-timeAndrew Jones2020-10-081-0/+8
* target/arm: Move id_pfr0, id_pfr1 into ARMISARegistersPeter Maydell2020-10-011-10/+10
* target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA checkPeter Maydell2020-10-011-1/+0Star
* target/arm: Set instance_align on CPUARM TypeInfoRichard Henderson2020-09-181-0/+2
* target/arm: Remove no-longer-reachable 32-bit KVM codePeter Maydell2020-09-141-60/+53Star
* target/arm: Move setting of CPU halted state to generic codeThiago Jung Bauermann2020-09-081-1/+0Star
* target/arm: Move start-powered-off property to generic CPUStateThiago Jung Bauermann2020-09-081-3/+2Star
* target/arm: Enable FP16 in '-cpu max'Peter Maydell2020-09-011-1/+2
* target/arm: Implement FPST_STD_F16 fpstatusPeter Maydell2020-08-241-0/+3
* hw/arm/virt: Enable MTE via a machine propertyRichard Henderson2020-07-201-8/+11
* target/arm: Create tagged ram when MTE is enabledRichard Henderson2020-06-261-4/+48
* target/arm: Complete TBI clearing for user-only for SVERichard Henderson2020-06-261-0/+3
* target/arm: Restrict the values of DCZID.BS under TCGRichard Henderson2020-06-261-0/+24
* target/arm: Define arm_cpu_do_unaligned_access for user-onlyRichard Henderson2020-06-261-1/+1
* target/arm: Check supported KVM features globally (not per vCPU)Philippe Mathieu-Daudé2020-06-231-1/+1
* target/arm/cpu: adjust virtual time for all KVM arm cpusfangying2020-06-161-2/+4
* qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster2020-05-151-7/+4Star
* target/arm: Restrict TCG cpus to TCG accelPhilippe Mathieu-Daudé2020-05-111-634/+0Star
* target/arm/cpu: Restrict v8M IDAU interface to Aarch32 CPUsPhilippe Mathieu-Daudé2020-05-111-1/+1
* target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[]Philippe Mathieu-Daudé2020-05-111-7/+9
* target/arm: Make set_feature() available for other filesThomas Huth2020-05-111-10/+0Star
* target/arm: Use uint64_t for midr field in CPU state structPhilippe Mathieu-Daudé2020-05-041-1/+1
* target/arm: Implement ARMv8.2-TTS2UXNPeter Maydell2020-05-041-0/+1
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