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path: root/target/arm/cpu.c
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* target/arm: Add pre-EL change hooksAaron Lindsay2018-04-261-0/+16
* target/arm: Support multiple EL change hooksAaron Lindsay2018-04-261-5/+16
* target/arm: Make 'any' CPU just an alias for 'max'Peter Maydell2018-03-091-23/+27
* target/arm: Add "-cpu max" supportPeter Maydell2018-03-091-0/+24
* target/arm: Move definition of 'host' cpu type into cpu.cPeter Maydell2018-03-091-0/+24
* target/arm: Query host CPU features on-demand at instance initPeter Maydell2018-03-091-0/+13
* target/arm: Add a core count propertyAlistair Francis2018-03-091-0/+6
* target/arm: Enable ARM_FEATURE_V8_FCMARichard Henderson2018-03-021-0/+1
* target/arm: Enable ARM_FEATURE_V8_RDMRichard Henderson2018-03-021-0/+1
* target/arm: Add Cortex-M33Peter Maydell2018-03-021-0/+31
* target/arm: Define init-svtor property for the reset secure VTOR valuePeter Maydell2018-03-021-4/+14
* target/arm: Define an IDAU interfacePeter Maydell2018-03-021-0/+15
* target/*/cpu.h: remove softfloat.hAlex Bennée2018-02-211-0/+1
* hw/intc/armv7m_nvic: Don't hardcode M profile ID registers in NVICPeter Maydell2018-02-151-0/+28
* qdev: use device_class_set_parent_realize/unrealize/reset()Philippe Mathieu-Daudé2018-02-051-2/+2
* accel/tcg: add size paremeter in tlb_fill()Laurent Vivier2018-01-251-2/+2
* cpu: refactor cpu_address_space_init()Peter Xu2017-12-211-10/+3Star
* disas: Dump insn bytes along with capstone disassemblyRichard Henderson2017-11-091-0/+6
* Merge remote-tracking branch 'remotes/rth/tags/pull-dis-20171026' into stagingPeter Maydell2017-10-271-24/+25
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| * arm: Support Capstone in disas_set_infoRichard Henderson2017-10-251-3/+18
| * target/arm: Don't set INSN_ARM_BE32 for CONFIG_USER_ONLYRichard Henderson2017-10-251-2/+7
| * target/arm: Move BE32 disassembler fixupRichard Henderson2017-10-251-19/+0Star
* | tcg: Avoid setting tcg_initialize if !CONFIG_TCGRichard Henderson2017-10-261-0/+2
* | qom: Introduce CPUClass.tcg_initializeRichard Henderson2017-10-241-5/+1Star
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* qom/cpu: move cpu_model null check to cpu_class_by_name()Philippe Mathieu-Daudé2017-10-101-4/+0Star
* nvic: Implement Security Attribution Unit registersPeter Maydell2017-10-061-0/+27
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2017-09-231-8/+8
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| * memory: Get rid of address_space_init_shareableAlexey Kardashevskiy2017-09-221-8/+8
* | nvic: Implement AIRCR changes for v8MPeter Maydell2017-09-211-0/+7
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* arm: drop intermediate cpu_model -> cpu type parsing and use cpu type directlyIgor Mammedov2017-09-191-1/+1
* target/arm: Clear exclusive monitor on v7M reset, exception entry/exitPeter Maydell2017-09-141-0/+6
* target/arm: Add Jazelle featurePortia Stephens2017-09-071-0/+3
* target/arm: Implement new do_transaction_failed hookPeter Maydell2017-09-071-0/+1
* target/arm: Make CCR register banked for v8MPeter Maydell2017-09-071-3/+9
* target/arm: Make MPU_RNR register banked for v8MPeter Maydell2017-09-071-1/+2
* target/arm: Make MPU_RBAR, MPU_RLAR banked for v8MPeter Maydell2017-09-071-6/+20
* target/arm: Make MPU_MAIR0, MPU_MAIR1 registers banked for v8MPeter Maydell2017-09-071-2/+4
* target/arm: Register second AddressSpace for secure v8M CPUsPeter Maydell2017-09-071-7/+6Star
* target/arm: Add state field, feature bit and migration for v8M secure statePeter Maydell2017-09-071-0/+4
* target/arm: Implement ARMv8M's PMSAv8 registersPeter Maydell2017-09-071-11/+25
* hw/arm/virt: add pmu interrupt stateAndrew Jones2017-09-041-0/+2
* target/arm: Don't store M profile PRIMASK and FAULTMASK in daifPeter Maydell2017-09-041-5/+0Star
* target/arm: Move PMSAv7 reset into arm_cpu_reset() so M profile MPUs get resetPeter Maydell2017-07-311-0/+14
* target/arm: Make Cortex-M3 and M4 default to 8 PMSA regionsPeter Maydell2017-07-171-1/+11
* Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell2017-06-061-1/+1
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| * numa: move numa_node from CPUState into target specific classesIgor Mammedov2017-06-051-1/+1
* | target/arm: add data cache invalidation cp15 instruction to cortex-r5Luc MICHEL2017-06-041-0/+2
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* arm: All M profile cores are PMSAPeter Maydell2017-06-021-0/+8
* arm: Don't clear ARM_FEATURE_PMSA for no-mpu configsPeter Maydell2017-06-021-1/+7
* arm: Clean up handling of no-MPU PMSA CPUsPeter Maydell2017-06-021-6/+6
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