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path: root/target/arm/cpu64.c
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| * target/arm/cpu64: Ensure kvm really supports aarch64=offAndrew Jones2019-08-161-6/+6
| * target/arm: generate a custom MIDR for -cpu maxAlex Bennée2019-08-161-0/+19
* | Clean up inclusion of sysemu/sysemu.hMarkus Armbruster2019-08-161-1/+0Star
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* Include qemu/module.h where needed, drop it from qemu-common.hMarkus Armbruster2019-06-121-1/+1
* target/arm: Use env_cpu, env_archcpuRichard Henderson2019-06-101-1/+1
* arm: Remove unnecessary includes of hw/arm/arm.hPeter Maydell2019-05-231-1/+0Star
* target/arm: Implement ARMv8.5-RNGRichard Henderson2019-05-221-0/+1
* target/arm: Implement ARMv8.5-FRINTRichard Henderson2019-03-051-0/+1
* target/arm: Implement ARMv8.5-CondMRichard Henderson2019-03-051-1/+1
* target/arm: Implement ARMv8.4-CondMRichard Henderson2019-03-051-0/+1
* target/arm: Implement ARMv8.0-PredInvRichard Henderson2019-03-051-0/+2
* target/arm: Implement ARMv8.0-SBRichard Henderson2019-03-051-0/+2
* target/arm: Enable ARMv8.2-FHM for -cpu maxRichard Henderson2019-02-281-0/+2
* target/arm: Implement ARMv8.3-JSConvRichard Henderson2019-02-211-0/+2
* target/arm: Enable BTI for -cpu maxRichard Henderson2019-02-051-0/+4
* target/arm: Always enable pac keys for user-onlyRichard Henderson2019-02-011-60/+0Star
* arm: Clarify the logic of set_pc()Julia Suvorova2019-02-011-15/+0Star
* target/arm: Add array for supported PMU events, generate PMCEID[01]_EL0Aaron Lindsay2019-01-211-4/+0Star
* target/arm: Enable PAuth for user-onlyRichard Henderson2019-01-211-0/+60
* target/arm: Enable PAuth for -cpu maxRichard Henderson2019-01-211-0/+4
* arm: replace instance_post_init()Marc-André Lureau2019-01-071-4/+20
* target/arm: Implement the ARMv8.1-LOR extensionRichard Henderson2018-12-131-0/+1
* target/arm: Implement the ARMv8.1-HPD extensionRichard Henderson2018-12-131-0/+4
* target/arm: Move id_aa64mmfr* to ARMISARegistersPeter Maydell2018-12-131-3/+3
* target/arm: Convert v8.2-fp16 from feature bit to aa64pfr0 testRichard Henderson2018-10-241-7/+9
* target/arm: Convert sve from feature bit to aa64pfr0 testRichard Henderson2018-10-241-1/+4
* target/arm: Convert v8 extensions from feature bits to isar testsRichard Henderson2018-10-241-23/+34
* target/arm: Move some system registers into a substructureRichard Henderson2018-10-241-35/+35
* target/arm: Add the Cortex-A72Edgar E. Iglesias2018-10-161-3/+63
* target/arm: Handle SVE vector length changes in system modeRichard Henderson2018-10-081-42/+0Star
* target/arm: Add sve-max-vq cpu property to -cpu maxRichard Henderson2018-08-161-0/+29
* target/arm: Add ID_ISAR6Richard Henderson2018-06-291-0/+2
* target/arm: Prune a57 features from maxRichard Henderson2018-06-291-9/+0Star
* target/arm: Implement ARMv8.2-DotProdRichard Henderson2018-06-291-0/+1
* target/arm: Enable SVE for aarch64-linux-userRichard Henderson2018-06-291-0/+1
* target/arm: Enable ARM_FEATURE_V8_ATOMICS for user-onlyRichard Henderson2018-05-101-0/+1
* target/arm: Make 'any' CPU just an alias for 'max'Peter Maydell2018-03-091-31/+28Star
* target/arm: Add "-cpu max" supportPeter Maydell2018-03-091-0/+21
* linux-user: Implement aarch64 PR_SVE_SET/GET_VLRichard Henderson2018-03-091-0/+41
* target/arm: Add a core count propertyAlistair Francis2018-03-091-2/+4
* target/arm: Enable ARM_FEATURE_V8_FCMARichard Henderson2018-03-021-0/+1
* target/arm: Enable ARM_FEATURE_V8_RDMRichard Henderson2018-03-021-0/+1
* target/arm: Enable ARM_V8_FP16 feature bit for the AArch64 "any" CPUPeter Maydell2018-03-011-0/+1
* target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction supportArd Biesheuvel2018-02-091-0/+4
* target-arm: Enable EL2 feature bit on A53 and A57Peter Maydell2017-01-201-0/+2
* target-arm: Add ARMCPU fields for GIC CPU i/f configPeter Maydell2017-01-201-0/+6
* Move target-* CPU file into a target/ folderThomas Huth2016-12-201-0/+353
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