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Experimental fork of QEMU with video encoding patches
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target
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arm
/
cpu_tcg.c
Commit message (
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)
Author
Age
Files
Lines
*
Revert "target/arm: Make number of counters in PMCR follow the CPU"
Peter Maydell
2021-04-06
1
-5
/
+0
*
target/arm: Make number of counters in PMCR follow the CPU
Peter Maydell
2021-03-30
1
-0
/
+5
*
target/arm: Restrict v7A TCG cpus to TCG accel
Philippe Mathieu-Daudé
2021-03-08
1
-0
/
+318
*
target/arm: Restrict v8M IDAU to TCG
Philippe Mathieu-Daudé
2021-03-05
1
-0
/
+8
*
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
Claudio Fontana
2021-02-05
1
-5
/
+23
*
cpu: move cc->do_interrupt to tcg_ops
Claudio Fontana
2021-02-05
1
-5
/
+4
*
cpu: Move cpu_exec_* to tcg_ops
Eduardo Habkost
2021-02-05
1
-1
/
+6
*
target/arm: Implement Cortex-M55 model
Peter Maydell
2021-01-08
1
-0
/
+42
*
target/arm: Add ID register values for Cortex-M0
Peter Maydell
2020-10-01
1
-0
/
+24
*
target/arm: Move id_pfr0, id_pfr1 into ARMISARegisters
Peter Maydell
2020-10-01
1
-18
/
+18
*
target/arm: Use correct GDB XML for M-profile cores
Peter Maydell
2020-05-14
1
-0
/
+1
*
target/arm: Restrict TCG cpus to TCG accel
Philippe Mathieu-Daudé
2020-05-11
1
-0
/
+664