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path: root/target/arm/internals.h
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* target/arm: Move arm_debug_exception_fsr to debug_helper.cRichard Henderson2022-06-101-25/+0Star
* target/arm: Move arm_generate_debug_exceptions out of lineRichard Henderson2022-06-101-0/+1
* target/arm: Move arm_singlestep_active out of lineRichard Henderson2022-06-101-0/+1
* target/arm: Move exception_target_el out of lineRichard Henderson2022-06-101-15/+1Star
* target/arm: Use uint32_t instead of bitmap for sve vq'sRichard Henderson2022-06-081-0/+5
* target/arm: Merge aarch64_sve_zcr_get_valid_len into callerRichard Henderson2022-06-081-11/+0Star
* target/arm: Add el_is_in_hostRichard Henderson2022-06-081-0/+2
* target/arm: Move get_phys_addr to ptw.cRichard Henderson2022-06-081-2/+16
* target/arm: Move stage_1_mmu_idx decl to internals.hRichard Henderson2022-06-081-0/+5
* Fix 'writeable' typosPeter Maydell2022-06-081-2/+2
* target/arm: Make number of counters in PMCR follow the CPUPeter Maydell2022-05-191-1/+3
* target/arm: Postpone interpretation of stage 2 descriptor attribute bitsPeter Maydell2022-05-191-1/+6
* target/arm: Implement virtual SError exceptionsRichard Henderson2022-05-091-0/+8
* target/arm: Split out aa32_max_featuresRichard Henderson2022-05-091-0/+2
* target/arm: Move cortex impdef sysregs to cpu_tcg.cRichard Henderson2022-05-091-0/+6
* target/arm: Use field names for accessing DBGWCRnRichard Henderson2022-04-281-0/+12
* compiler.h: replace QEMU_NORETURN with G_NORETURNMarc-André Lureau2022-04-211-6/+6
* target/arm: Fix MTE access checks for disabled SEL2Idan Horowitz2022-04-011-1/+1
* target/arm: Implement FEAT_LPA2Richard Henderson2022-03-021-0/+2
* target/arm: Extend arm_fi_to_lfsc to level -1Richard Henderson2022-03-021-6/+29
* target/arm: Honor TCR_ELx.{I}PSRichard Henderson2022-03-021-0/+1
* target/arm: Move arm_pamax out of lineRichard Henderson2022-03-021-18/+1Star
* target/arm: Fault on invalid TCR_ELx.TxSZRichard Henderson2022-03-021-0/+1
* target/arm: Log CPU index in 'Taking exception' logPeter Maydell2022-01-281-1/+1
* target/arm: Implement arm_cpu_record_sigbusRichard Henderson2021-11-021-0/+2
* target/arm: Implement arm_cpu_record_sigsegvRichard Henderson2021-11-021-0/+6
* target/arm: Move gdbstub related code out of helper.cPeter Maydell2021-09-301-0/+7
* hw/core: Make do_unaligned_access noreturnRichard Henderson2021-09-221-1/+1
* arm: Move PMC register definitions to internals.hAlexander Graf2021-09-201-0/+44
* target/arm: Export aarch64_sve_zcr_get_valid_lenRichard Henderson2021-07-271-0/+10
* target/arm: Implement debug_check_breakpointRichard Henderson2021-07-211-0/+3
* target/arm: Implement MVE VLDR/VSTR (non-widening forms)Peter Maydell2021-06-211-0/+11
* target/arm: Rename mte_probe1 to mte_probeRichard Henderson2021-04-301-1/+1
* target/arm: Merge mte_check1, mte_checkNRichard Henderson2021-04-301-4/+1Star
* target/arm: Replace MTEDESC ESIZE+TSIZE with SIZEM1Richard Henderson2021-04-301-2/+2
* target/arm: Add support for FEAT_SSBS, Speculative Store Bypass SafeRebecca Cran2021-03-051-0/+6
* exec: Move TranslationBlock typedef to qemu/typedefs.hRichard Henderson2021-02-181-2/+1Star
* target/arm: Split out syndrome.h from internals.hRichard Henderson2021-02-161-244/+1Star
* target/arm: Use the proper TBI settings for linux-userRichard Henderson2021-02-161-2/+2
* target/arm: Add support for FEAT_DIT, Data Independent TimingRebecca Cran2021-02-111-0/+6
* cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana2021-02-051-0/+6
* target/arm: Introduce PREDDESC field definitionsRichard Henderson2021-01-191-0/+9
* target/arm: set HPFAR_EL2.NS on secure stage 2 faultsRémi Denis-Courmont2021-01-191-0/+2
* target/arm: secure stage 2 translation regimeRémi Denis-Courmont2021-01-191-0/+22
* target/arm: add MMU stage 1 for Secure EL2Rémi Denis-Courmont2021-01-191-0/+12
* target/arm: Ignore HCR_EL2.ATA when {E2H,TGE} != 11Richard Henderson2020-10-201-4/+5
* target/arm: Always pass cacheattr to get_phys_addrRichard Henderson2020-06-261-1/+2
* target/arm: Add mte helpers for sve scalar + int loadsRichard Henderson2020-06-261-0/+6
* target/arm: Implement helper_mte_checkNRichard Henderson2020-06-261-0/+2
* target/arm: Implement helper_mte_check1Richard Henderson2020-06-261-0/+48