| Commit message (Expand) | Author | Age | Files | Lines |
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| ... | |
| * | target/arm: Vectorize SABA/UABA | Richard Henderson | 2020-05-14 | 1 | -10/+7 |
| * | target/arm: Vectorize SABD/UABD | Richard Henderson | 2020-05-14 | 1 | -1/+7 |
| * | target/arm: Create gen_gvec_{qrdmla,qrdmls} | Richard Henderson | 2020-05-14 | 1 | -32/+2 |
| * | target/arm: Remove fp_status from helper_{recpe, rsqrte}_u32 | Richard Henderson | 2020-05-14 | 1 | -3/+2 |
| * | target/arm: Create gen_gvec_{uqadd, sqadd, uqsub, sqsub} | Richard Henderson | 2020-05-14 | 1 | -12/+10 |
| * | target/arm: Create gen_gvec_{cmtst,ushl,sshl} | Richard Henderson | 2020-05-14 | 1 | -12/+6 |
| * | target/arm: Create gen_gvec_{mla,mls} | Richard Henderson | 2020-05-14 | 1 | -2/+2 |
| * | target/arm: Create gen_gvec_{ceq,clt,cle,cgt,cge}0 | Richard Henderson | 2020-05-14 | 1 | -11/+11 |
| * | target/arm: Tidy handle_vec_simd_shri | Richard Henderson | 2020-05-14 | 1 | -42/+14 |
| * | target/arm: Create gen_gvec_{sri,sli} | Richard Henderson | 2020-05-14 | 1 | -17/+3 |
| * | target/arm: Create gen_gvec_{u,s}{rshr,rsra} | Richard Henderson | 2020-05-14 | 1 | -3/+8 |
| * | target/arm: Create gen_gvec_[us]sra | Richard Henderson | 2020-05-14 | 1 | -13/+2 |
| * | target/arm: Use tcg_gen_gvec_dup_imm | Richard Henderson | 2020-05-06 | 1 | -5/+5 |
| * | target/arm: Move gen_ function typedefs to translate.h | Peter Maydell | 2020-05-04 | 1 | -17/+0 |
| * | target/arm: Vectorize integer comparison vs zero | Richard Henderson | 2020-04-30 | 1 | -47/+17 |
| * | target/arm: Move computation of index in handle_simd_dupe | Richard Henderson | 2020-03-23 | 1 | -1/+2 |
| * | target/arm: Assert immh != 0 in disas_simd_shift_imm | Richard Henderson | 2020-03-23 | 1 | -0/+3 |
| * | target/arm: Disable clean_data_tbi for system mode | Richard Henderson | 2020-03-12 | 1 | -0/+11 |
| * | target/arm: Clean address for DC ZVA | Richard Henderson | 2020-03-05 | 1 | -1/+1 |
| * | target/arm: Introduce core_to_aa64_mmu_idx | Richard Henderson | 2020-03-05 | 1 | -1/+1 |
| * | target/arm: Implement v8.4-RCPC | Peter Maydell | 2020-02-28 | 1 | -0/+90 |
| * | target/arm: Implement v8.3-RCPC | Peter Maydell | 2020-02-28 | 1 | -0/+24 |
| * | target/arm: Convert PMULL.8 to gvec | Richard Henderson | 2020-02-21 | 1 | -9/+18 |
| * | target/arm: Convert PMULL.64 to gvec | Richard Henderson | 2020-02-21 | 1 | -25/+3 |
| * | target/arm: Convert PMUL.8 to gvec | Richard Henderson | 2020-02-21 | 1 | -7/+3 |
| * | target/arm: Vectorize USHL and SSHL | Richard Henderson | 2020-02-21 | 1 | -12/+6 |
| * | target/arm: Flush high bits of sve register after AdvSIMD INS | Richard Henderson | 2020-02-21 | 1 | -0/+6 |
| * | target/arm: Flush high bits of sve register after AdvSIMD ZIP/UZP/TRN | Richard Henderson | 2020-02-21 | 1 | -0/+1 |
| * | target/arm: Flush high bits of sve register after AdvSIMD TBL/TBX | Richard Henderson | 2020-02-21 | 1 | -0/+1 |
| * | target/arm: Flush high bits of sve register after AdvSIMD EXT | Richard Henderson | 2020-02-21 | 1 | -0/+1 |
| * | target/arm: Update MSR access to UAO | Richard Henderson | 2020-02-13 | 1 | -0/+14 |
| * | target/arm: Update MSR access for PAN | Richard Henderson | 2020-02-13 | 1 | -0/+14 |
| * | target/arm: Add mmu_idx for EL1 and EL2 w/ PAN enabled | Richard Henderson | 2020-02-13 | 1 | -0/+3 |
| * | target/arm: Update get_a64_user_mem_index for VHE | Richard Henderson | 2020-02-07 | 1 | -16/+28 |
| * | target/arm: Add regime_has_2_ranges | Richard Henderson | 2020-02-07 | 1 | -2/+1 |
| * | target/arm: Rename ARMMMUIdx_S1SE[01] to ARMMMUIdx_SE10_[01] | Richard Henderson | 2020-02-07 | 1 | -2/+2 |
| * | target/arm: Rename ARMMMUIdx_S2NS to ARMMMUIdx_Stage2 | Richard Henderson | 2020-02-07 | 1 | -1/+1 |
| * | target/arm: Rename ARMMMUIdx*_S12NSE* to ARMMMUIdx*_E10_* | Richard Henderson | 2020-02-07 | 1 | -2/+2 |
| * | target/arm: fix TCG leak for fcvt half->double | Alex Bennée | 2020-01-31 | 1 | -2/+2 |
| * | tcg: Search includes from the project root source directory | Philippe Mathieu-Daudé | 2020-01-16 | 1 | -2/+2 |
| * | Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-reques... | Peter Maydell | 2020-01-13 | 1 | -0/+2 |
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| | * | arm/translate-a64: fix uninitialized variable warning | Pan Nengyuan | 2020-01-08 | 1 | -0/+2 |
| * | | target/arm: only update pc after semihosting completes | Alex Bennée | 2020-01-09 | 1 | -1/+1 |
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| * | target/arm: Rebuild hflags at MSR writes | Richard Henderson | 2019-10-24 | 1 | -2/+11 |
| * | Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190903' into staging | Peter Maydell | 2019-09-04 | 1 | -24/+24 |
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| | * | tcg: TCGMemOp is now accelerator independent MemOp | Tony Nguyen | 2019-09-03 | 1 | -24/+24 |
| * | | target/arm: Allow ARMCPRegInfo read/write functions to throw exceptions | Peter Maydell | 2019-09-03 | 1 | -0/+6 |
| * | | Revert "target/arm: Use unallocated_encoding for aarch32" | Richard Henderson | 2019-09-03 | 1 | -0/+7 |
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| * | icount: remove unnecessary gen_io_end calls | Pavel Dovgalyuk | 2019-08-20 | 1 | -4/+0 |
| * | target/arm: Use unallocated_encoding for aarch32 | Richard Henderson | 2019-08-16 | 1 | -7/+0 |
