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path: root/target/arm/translate-vfp.inc.c
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* target/arm: Check for dp support for dp VFM, not spPeter Maydell2019-06-181-4/+4
* target/arm: Only implement doubles if the FPU supports themPeter Maydell2019-06-171-0/+84
* target/arm: Fix typos in trans function prototypesPeter Maydell2019-06-171-14/+14
* target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_immPeter Maydell2019-06-171-24/+4Star
* target/arm: Move vfp_expand_imm() to translate.[ch]Peter Maydell2019-06-171-0/+33
* target/arm: Fix short-vector increment behaviourPeter Maydell2019-06-131-40/+60
* target/arm: Convert float-to-integer VCVT insns to decodetreePeter Maydell2019-06-131-0/+72
* target/arm: Convert VCVT fp/fixed-point conversion insns to decodetreePeter Maydell2019-06-131-0/+124
* target/arm: Convert VJCVT to decodetreePeter Maydell2019-06-131-0/+28
* target/arm: Convert integer-to-float insns to decodetreePeter Maydell2019-06-131-0/+58
* target/arm: Convert double-single precision conversion insns to decodetreePeter Maydell2019-06-131-0/+48
* target/arm: Convert VFP round insns to decodetreePeter Maydell2019-06-131-0/+163
* target/arm: Convert the VCVT-to-f16 insns to decodetreePeter Maydell2019-06-131-0/+62
* target/arm: Convert the VCVT-from-f16 insns to decodetreePeter Maydell2019-06-131-0/+82
* target/arm: Convert VFP comparison insns to decodetreePeter Maydell2019-06-131-0/+75
* target/arm: Convert VMOV (register) to decodetreePeter Maydell2019-06-131-0/+10
* target/arm: Convert VSQRT to decodetreePeter Maydell2019-06-131-0/+20
* target/arm: Convert VNEG to decodetreePeter Maydell2019-06-131-0/+10
* target/arm: Convert VABS to decodetreePeter Maydell2019-06-131-0/+167
* target/arm: Convert VMOV (imm) to decodetreePeter Maydell2019-06-131-0/+129
* target/arm: Convert VFP fused multiply-add insns to decodetreePeter Maydell2019-06-131-0/+121
* target/arm: Convert VDIV to decodetreePeter Maydell2019-06-131-0/+10
* target/arm: Convert VSUB to decodetreePeter Maydell2019-06-131-0/+10
* target/arm: Convert VADD to decodetreePeter Maydell2019-06-131-0/+10
* target/arm: Convert VNMUL to decodetreePeter Maydell2019-06-131-0/+24
* target/arm: Convert VMUL to decodetreePeter Maydell2019-06-131-0/+10
* target/arm: Convert VFP VNMLA to decodetreePeter Maydell2019-06-131-0/+34
* target/arm: Convert VFP VNMLS to decodetreePeter Maydell2019-06-131-0/+42
* target/arm: Convert VFP VMLS to decodetreePeter Maydell2019-06-131-0/+38
* target/arm: Convert VFP VMLA to decodetreePeter Maydell2019-06-131-0/+205
* target/arm: Remove VLDR/VSTR/VLDM/VSTM use of cpu_F0s and cpu_F0dPeter Maydell2019-06-131-18/+28
* target/arm: Convert the VFP load/store multiple insns to decodetreePeter Maydell2019-06-131-0/+162
* target/arm: Convert VFP VLDR and VSTR to decodetreePeter Maydell2019-06-131-0/+73
* target/arm: Convert VFP two-register transfer insns to decodetreePeter Maydell2019-06-131-0/+70
* target/arm: Convert "single-precision" register moves to decodetreePeter Maydell2019-06-131-0/+161
* target/arm: Convert "double-precision" register moves to decodetreePeter Maydell2019-06-131-0/+147
* target/arm: Add helpers for VFP register loads and storesPeter Maydell2019-06-131-20/+20
* target/arm: Move the VFP trans_* functions to translate-vfp.inc.cPeter Maydell2019-06-131-0/+337
* target/arm: Convert the VSEL instructions to decodetreePeter Maydell2019-06-131-0/+9
* target/arm: Factor out VFP access checking codePeter Maydell2019-06-131-0/+100
* target/arm: Add stubs for AArch32 VFP decodetreePeter Maydell2019-06-131-0/+31
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