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path: root/target/arm/translate.c
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* target/arm: Remove unused cpu_F0s, cpu_F0d, cpu_F1s, cpu_F1dPeter Maydell2019-06-171-10/+2Star
* target/arm: Stop using deprecated functions in NEON_2RM_VCVT_F32_F16Peter Maydell2019-06-171-15/+11Star
* target/arm: stop using deprecated functions in NEON_2RM_VCVT_F16_F32Peter Maydell2019-06-171-15/+12Star
* target/arm: Stop using cpu_F0s in Neon VCVT fixed-point opsPeter Maydell2019-06-171-34/+28Star
* target/arm: Stop using cpu_F0s for Neon f32/s32 VCVTPeter Maydell2019-06-171-60/+22Star
* target/arm: Stop using cpu_F0s for NEON_2RM_VRECPE_F and NEON_2RM_VRSQRTE_FPeter Maydell2019-06-171-3/+3
* target/arm: Stop using cpu_F0s for NEON_2RM_VCVT[ANPM][US]Peter Maydell2019-06-171-4/+3Star
* target/arm: Stop using cpu_F0s for NEON_2RM_VRINT*Peter Maydell2019-06-171-5/+3Star
* target/arm: Stop using cpu_F0s for NEON_2RM_VNEG_FPeter Maydell2019-06-171-11/+2Star
* target/arm: Stop using cpu_F0s for NEON_2RM_VABS_FPeter Maydell2019-06-171-11/+8Star
* target/arm: Convert float-to-integer VCVT insns to decodetreePeter Maydell2019-06-131-239/+2Star
* target/arm: Convert VCVT fp/fixed-point conversion insns to decodetreePeter Maydell2019-06-131-55/+2Star
* target/arm: Convert VJCVT to decodetreePeter Maydell2019-06-131-11/+1Star
* target/arm: Convert integer-to-float insns to decodetreePeter Maydell2019-06-131-11/+1Star
* target/arm: Convert double-single precision conversion insns to decodetreePeter Maydell2019-06-131-12/+1Star
* target/arm: Convert VFP round insns to decodetreePeter Maydell2019-06-131-44/+1Star
* target/arm: Convert the VCVT-to-f16 insns to decodetreePeter Maydell2019-06-131-78/+1Star
* target/arm: Convert the VCVT-from-f16 insns to decodetreePeter Maydell2019-06-131-55/+1Star
* target/arm: Convert VFP comparison insns to decodetreePeter Maydell2019-06-131-50/+1Star
* target/arm: Convert VMOV (register) to decodetreePeter Maydell2019-06-131-7/+1Star
* target/arm: Convert VSQRT to decodetreePeter Maydell2019-06-131-13/+1Star
* target/arm: Convert VNEG to decodetreePeter Maydell2019-06-131-5/+1Star
* target/arm: Convert VABS to decodetreePeter Maydell2019-06-131-4/+8
* target/arm: Convert VMOV (imm) to decodetreePeter Maydell2019-06-131-25/+2Star
* target/arm: Convert VFP fused multiply-add insns to decodetreePeter Maydell2019-06-131-52/+1Star
* target/arm: Convert VDIV to decodetreePeter Maydell2019-06-131-20/+1Star
* target/arm: Convert VSUB to decodetreePeter Maydell2019-06-131-5/+1Star
* target/arm: Convert VADD to decodetreePeter Maydell2019-06-131-5/+1Star
* target/arm: Convert VNMUL to decodetreePeter Maydell2019-06-131-6/+1Star
* target/arm: Convert VMUL to decodetreePeter Maydell2019-06-131-4/+1Star
* target/arm: Convert VFP VNMLA to decodetreePeter Maydell2019-06-131-18/+1Star
* target/arm: Convert VFP VNMLS to decodetreePeter Maydell2019-06-131-23/+1Star
* target/arm: Convert VFP VMLS to decodetreePeter Maydell2019-06-131-7/+1Star
* target/arm: Convert VFP VMLA to decodetreePeter Maydell2019-06-131-6/+8
* target/arm: Remove VLDR/VSTR/VLDM/VSTM use of cpu_F0s and cpu_F0dPeter Maydell2019-06-131-18/+0Star
* target/arm: Convert the VFP load/store multiple insns to decodetreePeter Maydell2019-06-131-94/+3Star
* target/arm: Convert VFP VLDR and VSTR to decodetreePeter Maydell2019-06-131-20/+2Star
* target/arm: Convert VFP two-register transfer insns to decodetreePeter Maydell2019-06-131-44/+2Star
* target/arm: Convert "single-precision" register moves to decodetreePeter Maydell2019-06-131-145/+3Star
* target/arm: Convert "double-precision" register moves to decodetreePeter Maydell2019-06-131-81/+2Star
* target/arm: Add helpers for VFP register loads and storesPeter Maydell2019-06-131-0/+10
* target/arm: Move the VFP trans_* functions to translate-vfp.inc.cPeter Maydell2019-06-131-337/+0Star
* target/arm: Convert VCVTA/VCVTN/VCVTP/VCVTM to decodetreePeter Maydell2019-06-131-39/+33Star
* target/arm: Convert VRINTA/VRINTN/VRINTP/VRINTM to decodetreePeter Maydell2019-06-131-22/+38
* target/arm: Convert VMINNM, VMAXNM to decodetreePeter Maydell2019-06-131-13/+28
* target/arm: Convert the VSEL instructions to decodetreePeter Maydell2019-06-131-10/+25
* target/arm: Factor out VFP access checking codePeter Maydell2019-06-131-88/+13Star
* target/arm: Add stubs for AArch32 VFP decodetreePeter Maydell2019-06-131-0/+19
* target/arm: Use tcg_gen_gvec_bitselRichard Henderson2019-06-131-72/+6Star
* target/arm: Use env_cpu, env_archcpuRichard Henderson2019-06-101-1/+1
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