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* arm: Add Hypervisor.framework build targetAlexander Graf2021-09-212-0/+5
* hvf: arm: Implement PSCI handlingAlexander Graf2021-09-213-7/+139
* hvf: arm: Implement -cpu hostPeter Maydell2021-09-215-6/+124
* arm/hvf: Add a WFI handlerPeter Collingbourne2021-09-211-0/+79
* hvf: Add Apple Silicon supportAlexander Graf2021-09-202-0/+804
* arm: Move PMC register definitions to internals.hAlexander Graf2021-09-202-44/+44
* target/arm: Consolidate ifdef blocks in resetPeter Maydell2021-09-201-12/+10Star
* target/arm: Always clear exclusive monitor on resetPeter Maydell2021-09-201-3/+3
* target/arm: Don't skip M-profile reset entirely in user modePeter Maydell2021-09-201-0/+19
* target/arm: Restrict cpu_exec_interrupt() handler to sysemuPhilippe Mathieu-Daudé2021-09-143-7/+9
* accel/tcg: Add DisasContextBase argument to translator_ld*Ilya Leoshkevich2021-09-143-11/+12
* target/arm: Merge disas_a64_insn into aarch64_tr_translate_insnRichard Henderson2021-09-131-115/+109Star
* target/arm: Take an exception if PSTATE.IL is setPeter Maydell2021-09-137-0/+49
* hw/arm/virt: add ITS support in virt GICShashi Mallela2021-09-131-2/+2
* hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VMMarc Zyngier2021-09-131-1/+6
* target-arm: Add support for Fujitsu A64FXShuuichirou Ishii2021-09-011-0/+48
* target/arm: Enable MVE in Cortex-M55Peter Maydell2021-09-011-5/+2Star
* target/arm: Implement MVE VRINT insnsPeter Maydell2021-09-014-0/+93
* target/arm: Implement MVE VCVT between single and half precisionPeter Maydell2021-09-014-0/+108
* target/arm: Implement MVE VCVT with specified rounding modePeter Maydell2021-09-014-0/+105
* target/arm: Implement MVE VCVT between fp and integerPeter Maydell2021-09-012-0/+39
* target/arm: Implement MVE VCVT between floating and fixed pointPeter Maydell2021-09-014-0/+82
* target/arm: Implement MVE fp scalar comparisonsPeter Maydell2021-09-014-24/+131
* target/arm: Implement MVE fp vector comparisonsPeter Maydell2021-09-014-6/+137
* target/arm: Implement MVE FP max/min across vectorPeter Maydell2021-09-014-6/+102
* target/arm: Implement MVE fp-with-scalar VFMA, VFMASPeter Maydell2021-09-014-3/+56
* target/arm: Implement MVE scalar fp insnsPeter Maydell2021-09-014-6/+85
* target/arm: Implement MVE VMAXNMA and VMINNMAPeter Maydell2021-09-014-0/+42
* target/arm: Implement MVE VCMUL and VCMLAPeter Maydell2021-09-014-8/+139
* target/arm: Implement MVE VFMA and VFMSPeter Maydell2021-09-014-0/+48
* target/arm: Implement MVE VCADDPeter Maydell2021-09-014-1/+57
* target/arm: Implement MVE VSUB, VMUL, VABD, VMAXNM, VMINNMPeter Maydell2021-09-014-0/+42
* target/arm: Implement MVE VADD (floating-point)Peter Maydell2021-09-016-6/+76
* target/arm: Do hflags rebuild in cpsr_write()Peter Maydell2021-08-262-2/+13
* target/arm: Implement HSTR.TJDBXPeter Maydell2021-08-266-0/+55
* target/arm: Implement HSTR.TTEEPeter Maydell2021-08-262-2/+18
* target/arm: Avoid assertion trying to use KVM and multiple ASesPeter Maydell2021-08-261-0/+23
* target/arm/cpu64: Validate sve vector lengths are supportedAndrew Jones2021-08-261-56/+45Star
* target/arm/cpu64: Replace kvm_supported with sve_vq_supportedAndrew Jones2021-08-261-8/+11
* target/arm/kvm64: Ensure sve vls map is completely clearAndrew Jones2021-08-261-1/+1
* target/arm/cpu: Introduce sve_vq_supported bitmapAndrew Jones2021-08-262-0/+6
* target/arm: kvm: use RCU_READ_LOCK_GUARD() in kvm_arch_fixup_msi_route()Hamza Mahfooz2021-08-251-9/+8Star
* target/arm: Implement M-profile trapping on division by zeroPeter Maydell2021-08-255-6/+26
* target/arm: Re-indent sdiv and udiv helpersPeter Maydell2021-08-251-6/+9
* target/arm: Implement MVE interleaving loads/storesPeter Maydell2021-08-254-0/+495
* target/arm: Implement MVE scatter-gather immediate formsPeter Maydell2021-08-254-36/+150
* target/arm: Implement MVE scatter-gather insnsPeter Maydell2021-08-254-0/+270
* target/arm: Implement MVE VCTPPeter Maydell2021-08-256-1/+58
* target/arm: Implement MVE VPNOTPeter Maydell2021-08-254-0/+38
* target/arm: Implement MVE VMOV to/from 2 general-purpose registersPeter Maydell2021-08-254-1/+91