summaryrefslogtreecommitdiffstats
path: root/target/arm
Commit message (Expand)AuthorAgeFilesLines
* target/arm: Correct calculation of tlb range invalidate lengthPeter Maydell2021-12-151-3/+3
* target/arm: Suppress bp for exceptions with more priorityRichard Henderson2021-12-151-0/+23
* target/arm: Assert thumb pc is alignedRichard Henderson2021-12-153-2/+20
* target/arm: Take an exception if PC is misalignedRichard Henderson2021-12-155-1/+60
* target/arm: Split compute_fsr_fsc out of arm_deliver_faultRichard Henderson2021-12-151-17/+28
* target/arm: Advance pc for arch single-step exceptionRichard Henderson2021-12-151-0/+1
* target/arm: Split arm_pre_translate_insnRichard Henderson2021-12-151-3/+7
* target/arm: Hoist pc_next to a local variable in thumb_tr_translate_insnRichard Henderson2021-12-151-8/+8
* target/arm: Hoist pc_next to a local variable in arm_tr_translate_insnRichard Henderson2021-12-151-4/+5
* target/arm: Hoist pc_next to a local variable in aarch64_tr_translate_insnRichard Henderson2021-12-151-3/+4
* Revert "arm: tcg: Adhere to SMCCC 1.3 section 5.2"Peter Maydell2021-11-221-6/+29
* Merge remote-tracking branch 'remotes/rth/tags/pull-arm-20211102-2' into stagingRichard Henderson2021-11-035-28/+51
|\
| * hvf: arm: Ignore cache operations on MMIOAlexander Graf2021-11-021-0/+7
| * target/arm: Use tcg_constant_i32() in gen_rev16()Philippe Mathieu-Daudé2021-11-021-2/+1Star
| * target/arm: Use tcg_constant_i64() in do_sat_addsub_64()Philippe Mathieu-Daudé2021-11-021-9/+8Star
| * target/arm: Use the constant variant of store_cpu_field() when possiblePhilippe Mathieu-Daudé2021-11-021-15/+6Star
| * target/arm: Introduce store_cpu_field_constant() helperPhilippe Mathieu-Daudé2021-11-021-0/+3
| * target/arm: Use tcg_constant_i32() in op_smlad()Philippe Mathieu-Daudé2021-11-021-2/+1Star
| * target/arm: Advertise MVE to gdb when presentPeter Maydell2021-11-021-0/+25
* | target/arm: Implement arm_cpu_record_sigbusRichard Henderson2021-11-024-0/+10
* | target/arm: Implement arm_cpu_record_sigsegvRichard Henderson2021-11-024-21/+33
* | target/arm: Use cpu_loop_exit_sigsegv for mte tag lookupRichard Henderson2021-11-021-4/+2Star
* | target/arm: Fixup comment re handle_cpu_signalRichard Henderson2021-11-021-1/+1
|/
* target/arm: Drop checks for singlestep_enabledRichard Henderson2021-10-162-38/+8Star
* target/arm: Use cpu_*_mmu instead of helper_*_mmuRichard Henderson2021-10-132-47/+11Star
* accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.hRichard Henderson2021-10-131-1/+0Star
* target/arm: Use MO_128 for 16 byte atomicsRichard Henderson2021-10-131-4/+4
* tcg: Rename TCGMemOpIdx to MemOpIdxRichard Henderson2021-10-062-9/+9
* tcg: Expand MO_SIZE to 3 bitsRichard Henderson2021-10-061-1/+1
* Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210930'...Peter Maydell2021-09-305-291/+307
|\
| * target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XMLPeter Maydell2021-09-301-16/+40
| * target/arm: Move gdbstub related code out of helper.cPeter Maydell2021-09-304-271/+277
| * target/arm: Fix coding style issues in gdbstub code in helper.cPeter Maydell2021-09-301-7/+16
| * arm: tcg: Adhere to SMCCC 1.3 section 5.2Alexander Graf2021-09-301-29/+6Star
* | memory: Name all the memory listenersPeter Xu2021-09-301-0/+1
|/
* hw/core: Make do_unaligned_access noreturnRichard Henderson2021-09-221-1/+1
* include/exec: Move cpu_signal_handler declarationRichard Henderson2021-09-221-7/+0Star
* target/arm: Optimize MVE 1op-immediate insnsPeter Maydell2021-09-211-5/+21
* target/arm: Optimize MVE VSLI and VSRIPeter Maydell2021-09-211-2/+2
* target/arm: Optimize MVE VSHLL and VMOVLPeter Maydell2021-09-211-8/+59
* target/arm: Optimize MVE VSHL, VSHR immediate formsPeter Maydell2021-09-211-20/+63
* target/arm: Optimize MVE VMVNPeter Maydell2021-09-211-1/+1
* target/arm: Optimize MVE VDUPPeter Maydell2021-09-211-4/+8
* target/arm: Optimize MVE VNEG, VABSPeter Maydell2021-09-211-10/+22
* target/arm: Optimize MVE arithmetic opsPeter Maydell2021-09-211-9/+11
* target/arm: Optimize MVE logic opsPeter Maydell2021-09-211-15/+36
* target/arm: Add TB flag for "MVE insns not predicated"Peter Maydell2021-09-217-9/+92
* target/arm: Enforce that FPDSCR.LTPSIZE is 4 on inbound migrationPeter Maydell2021-09-211-0/+13
* target/arm: Avoid goto_tb if we're trying to exit to the main loopPeter Maydell2021-09-211-1/+33
* hvf: arm: Add rudimentary PMC supportAlexander Graf2021-09-211-0/+179